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drm: renesas: shmobile: Remove support for SYS panels

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SYS panels are not used, and have no defined DT bindings.  Remove their
support to avoid impeding DT support.  It can always be added back
later.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/4ccca2a5ac05c73ea9fd6e44b8bc443fd9d14e0d.1694767209.git.geert+renesas@glider.be
This commit is contained in:
Laurent Pinchart 2023-09-15 10:53:30 +02:00 committed by Geert Uytterhoeven
parent e2eb7e6ee5
commit 04ed052f3a
3 changed files with 0 additions and 56 deletions
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20
drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c
View File

@ -55,24 +55,6 @@ static void shmob_drm_crtc_setup_geometry(struct shmob_drm_crtc *scrtc)
| ((idata->flags & SHMOB_DRM_IFACE_FL_DWCNT) ? LDMT1R_DWCNT : 0);
lcdc_write(sdev, LDMT1R, value);
if (idata->interface >= SHMOB_DRM_IFACE_SYS8A &&
idata->interface <= SHMOB_DRM_IFACE_SYS24) {
/* Setup SYS bus. */
value = (idata->sys.cs_setup << LDMT2R_CSUP_SHIFT)
| (idata->sys.vsync_active_high ? LDMT2R_RSV : 0)
| (idata->sys.vsync_dir_input ? LDMT2R_VSEL : 0)
| (idata->sys.write_setup << LDMT2R_WCSC_SHIFT)
| (idata->sys.write_cycle << LDMT2R_WCEC_SHIFT)
| (idata->sys.write_strobe << LDMT2R_WCLW_SHIFT);
lcdc_write(sdev, LDMT2R, value);
value = (idata->sys.read_latch << LDMT3R_RDLC_SHIFT)
| (idata->sys.read_setup << LDMT3R_RCSC_SHIFT)
| (idata->sys.read_cycle << LDMT3R_RCEC_SHIFT)
| (idata->sys.read_strobe << LDMT3R_RCLW_SHIFT);
lcdc_write(sdev, LDMT3R, value);
}
value = ((mode->hdisplay / 8) << 16) /* HDCN */
| (mode->htotal / 8); /* HTCN */
lcdc_write(sdev, LDHCNR, value);
@ -180,8 +162,6 @@ static void shmob_drm_crtc_start(struct shmob_drm_crtc *scrtc)
lcdc_write(sdev, LDDCKSTPR, 0);
lcdc_wait_bit(sdev, LDDCKSTPR, ~0, 0);
/* TODO: Setup SYS panel */
/* Setup geometry, format, frame buffer memory and operation mode. */
shmob_drm_crtc_setup_geometry(scrtc);

11
drivers/gpu/drm/renesas/shmobile/shmob_drm_drv.c
View File

@ -43,17 +43,6 @@ static int shmob_drm_init_interface(struct shmob_drm_device *sdev)
[SHMOB_DRM_IFACE_RGB18] = LDMT1R_MIFTYP_RGB18,
[SHMOB_DRM_IFACE_RGB24] = LDMT1R_MIFTYP_RGB24,
[SHMOB_DRM_IFACE_YUV422] = LDMT1R_MIFTYP_YCBCR,
[SHMOB_DRM_IFACE_SYS8A] = LDMT1R_IFM | LDMT1R_MIFTYP_SYS8A,
[SHMOB_DRM_IFACE_SYS8B] = LDMT1R_IFM | LDMT1R_MIFTYP_SYS8B,
[SHMOB_DRM_IFACE_SYS8C] = LDMT1R_IFM | LDMT1R_MIFTYP_SYS8C,
[SHMOB_DRM_IFACE_SYS8D] = LDMT1R_IFM | LDMT1R_MIFTYP_SYS8D,
[SHMOB_DRM_IFACE_SYS9] = LDMT1R_IFM | LDMT1R_MIFTYP_SYS9,
[SHMOB_DRM_IFACE_SYS12] = LDMT1R_IFM | LDMT1R_MIFTYP_SYS12,
[SHMOB_DRM_IFACE_SYS16A] = LDMT1R_IFM | LDMT1R_MIFTYP_SYS16A,
[SHMOB_DRM_IFACE_SYS16B] = LDMT1R_IFM | LDMT1R_MIFTYP_SYS16B,
[SHMOB_DRM_IFACE_SYS16C] = LDMT1R_IFM | LDMT1R_MIFTYP_SYS16C,
[SHMOB_DRM_IFACE_SYS18] = LDMT1R_IFM | LDMT1R_MIFTYP_SYS18,
[SHMOB_DRM_IFACE_SYS24] = LDMT1R_IFM | LDMT1R_MIFTYP_SYS24,
};
if (sdev->pdata->iface.interface >= ARRAY_SIZE(ldmt1r)) {

25
include/linux/platform_data/shmob_drm.h
View File

@ -27,17 +27,6 @@ enum shmob_drm_interface {
SHMOB_DRM_IFACE_RGB18, /* 18bpp */
SHMOB_DRM_IFACE_RGB24, /* 24bpp */
SHMOB_DRM_IFACE_YUV422, /* 16bpp */
SHMOB_DRM_IFACE_SYS8A, /* 24bpp, 8:8:8 */
SHMOB_DRM_IFACE_SYS8B, /* 18bpp, 8:8:2 */
SHMOB_DRM_IFACE_SYS8C, /* 18bpp, 2:8:8 */
SHMOB_DRM_IFACE_SYS8D, /* 16bpp, 8:8 */
SHMOB_DRM_IFACE_SYS9, /* 18bpp, 9:9 */
SHMOB_DRM_IFACE_SYS12, /* 24bpp, 12:12 */
SHMOB_DRM_IFACE_SYS16A, /* 16bpp */
SHMOB_DRM_IFACE_SYS16B, /* 18bpp, 16:2 */
SHMOB_DRM_IFACE_SYS16C, /* 18bpp, 2:16 */
SHMOB_DRM_IFACE_SYS18, /* 18bpp */
SHMOB_DRM_IFACE_SYS24, /* 24bpp */
};
struct shmob_drm_panel_data {
@ -46,19 +35,6 @@ struct shmob_drm_panel_data {
struct drm_mode_modeinfo mode;
};
struct shmob_drm_sys_interface_data {
unsigned int read_latch:6;
unsigned int read_setup:8;
unsigned int read_cycle:8;
unsigned int read_strobe:8;
unsigned int write_setup:8;
unsigned int write_cycle:8;
unsigned int write_strobe:8;
unsigned int cs_setup:3;
unsigned int vsync_active_high:1;
unsigned int vsync_dir_input:1;
};
#define SHMOB_DRM_IFACE_FL_DWPOL (1 << 0) /* Rising edge dot clock data latch */
#define SHMOB_DRM_IFACE_FL_DIPOL (1 << 1) /* Active low display enable */
#define SHMOB_DRM_IFACE_FL_DAPOL (1 << 2) /* Active low display data */
@ -67,7 +43,6 @@ struct shmob_drm_sys_interface_data {
struct shmob_drm_interface_data {
enum shmob_drm_interface interface;
struct shmob_drm_sys_interface_data sys;
unsigned int clk_div;
unsigned int flags;
};