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arm64: dts: ti: Add support for Kontron SMARC-sAM67

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Add device tree support for the Kontron SMARC-sAM67 module, which is
based on a TI AM67A SoC.

The module features:
 * Quad-core AM67A94 at 1.4GHz with 8 GiB RAM
 * 64 GiB eMMC, 4 MiB SPI flash for failsafe booting
 * Dedicated RTC
 * Multiple interfaces: 4x UART, 2x USB 2.0/USB 3.2, 2x GBE, QSPI,
        7x I2C,
 * Display support: 2x LVDS, 1x DSI (*), 1x DP (*)
 * Camera support: 4x CSI (*)
 * Onboard microcontroller for boot control, failsafe booting and
   external watchdog

(*) not yet supported by the kernel

There is a base device tree and overlays which will add optional
features. At the moment there is one full featured variant of that
board whose device tree is generated during build by merging all the
device tree overlays.

Signed-off-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://patch.msgid.link/20251017135116.548236-3-mwalle@kernel.org
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
This commit is contained in:
Michael Walle 2025-10-17 15:50:45 +02:00 committed by Vignesh Raghavendra
parent 22e1d0d8cd
commit 1c3c4df06f
5 changed files with 1216 additions and 0 deletions
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7
arch/arm64/boot/dts/ti/Makefile
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@ -137,7 +137,14 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-pcie1-ep.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-usb0-type-a.dtbo
# Boards with J722s SoC
k3-am67a-kontron-sa67-dtbs := k3-am67a-kontron-sa67-base.dtb \
k3-am67a-kontron-sa67-rtc-rv8263.dtbo k3-am67a-kontron-sa67-gbe1.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-am67a-beagley-ai.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am67a-kontron-sa67.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am67a-kontron-sa67-base.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am67a-kontron-sa67-gbe1.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-am67a-kontron-sa67-gpios.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-am67a-kontron-sa67-rtc-rv8263.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm.dtb
dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo

1091
arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-base.dts Normal file
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File diff suppressed because it is too large Load Diff

26
arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-gbe1.dtso Normal file
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@ -0,0 +1,26 @@
// SPDX-License-Identifier: GPL-2.0-only OR MIT
/*
* Second ethernet port GBE1.
*
* Copyright (c) 2025 Kontron Europe GmbH
*/
/dts-v1/;
/plugin/;
&cpsw3g_mdio {
#address-cells = <1>;
#size-cells = <0>;
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&cpsw_port2 {
phy-connection-type = "rgmii-id";
phy-handle = <&phy1>;
nvmem-cells = <&base_mac_address 1>;
nvmem-cell-names = "mac-address";
status = "okay";
};

61
arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-gpios.dtso Normal file
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@ -0,0 +1,61 @@
// SPDX-License-Identifier: GPL-2.0-only OR MIT
/*
* SMARC GPIOs.
*
* Copyright (c) 2025 Kontron Europe GmbH
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
#include "k3-pinctrl.h"
&main_gpio0 {
pinctrl-names = "default";
pinctrl-0 = <&main_gpio0_pins_default>;
};
&main_gpio1 {
pinctrl-names = "default";
pinctrl-0 = <&main_gpio1_pins_default>;
};
&main_pmx0 {
main_gpio0_pins_default: main-gpio0-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x0d0, PIN_INPUT, 7) /* (Y26) VOUT0_DATA6.GPIO0_51 */
J722S_IOPAD(0x0d4, PIN_INPUT, 7) /* (Y27) VOUT0_DATA7.GPIO0_52 */
J722S_IOPAD(0x118, PIN_INPUT, 7) /* (H26) MMC2_CLK.GPIO0_69 */
J722S_IOPAD(0x120, PIN_INPUT, 7) /* (F27) MMC2_CMD.GPIO0_70 */
>;
};
main_gpio1_pins_default: main-gpio1-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x194, PIN_INPUT, 7) /* (A25) MCASP0_AXR3.GPIO1_7 */
J722S_IOPAD(0x198, PIN_INPUT, 7) /* (A26) MCASP0_AXR2.GPIO1_8 */
J722S_IOPAD(0x1ac, PIN_INPUT, 7) /* (C27) MCASP0_AFSR.GPIO1_13 */
J722S_IOPAD(0x1b0, PIN_INPUT, 7) /* (F24) MCASP0_ACLKR.GPIO1_14 */
J722S_IOPAD(0x1d8, PIN_INPUT, 7) /* (D22) MCAN0_TX.GPIO1_24 */
J722S_IOPAD(0x1dc, PIN_INPUT, 7) /* (C22) MCAN0_RX.GPIO1_25 */
J722S_IOPAD(0x1e8, PIN_INPUT, 7) /* (C24) I2C1_SCL.GPIO1_28 */
J722S_IOPAD(0x1ec, PIN_INPUT, 7) /* (A22) I2C1_SDA.GPIO1_29 */
>;
};
};
&mcu_gpio0 {
pinctrl-names = "default";
pinctrl-0 = <&mcu_gpio0_pins_default>;
};
&mcu_pmx0 {
mcu_gpio0_pins_default: mcu-gpio0-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x02c, PIN_INPUT, 7) /* (C4) WKUP_UART0_CTSn.MCU_GPIO0_11 */
J722S_IOPAD(0x084, PIN_INPUT, 7) /* (F12) WKUP_CLKOUT0.MCU_GPIO0_23 */
>;
};
};

31
arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-rtc-rv8263.dtso Normal file
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@ -0,0 +1,31 @@
// SPDX-License-Identifier: GPL-2.0-only OR MIT
/*
* Microcrystal RV8263 RTC variant.
*
* Copyright (c) 2025 Kontron Europe GmbH
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/irq.h>
&{/} {
aliases {
rtc0 = "/bus@f0000/i2c@20000000/rtc@51"; /* &rtc */
rtc1 = "/bus@f0000/bus@b00000/rtc@2b1f0000"; /* &wkup_rtc0 */
};
};
&main_i2c0 {
#address-cells = <1>;
#size-cells = <0>;
rtc: rtc@51 {
compatible = "microcrystal,rv8263";
reg = <0x51>;
pinctrl-names = "default";
pinctrl-0 = <&rtc_pins_default>;
interrupts-extended = <&main_gpio0 36 IRQ_TYPE_EDGE_FALLING>;
};
};