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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-01-12 01:20:14 +00:00
arm64: dts: ti: Add support for AM6254atl SiP SK
This patch adds the dt for SK-AM62-SIP, which uses the existing
SK-AM62 board design with the new AM6254atl SiP. This changes the
location of memory node from the board dts to SoC level dtsi
(k3-am6254atl in our case).
Therefore this patch introduces the new 'k3-am625-sk-common.dtsi'
which represents the common hardware used for both 'am625-sk' and
'am6254atl-sk' boards with the inheritance hierarchy modified to:
k3-am625-sk.dts:
k3-am62 k3-am62x-sk-common
| |
k3-am625 k3-am625-sk-common
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+-----+------+
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k3-am625-sk
k3-am6254atl-sk.dts:
k3-am62
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k3-am625 k3-am62x-sk-common
| |
k3-am6254atl k3-am625-sk-common
| |
+-------+--------+
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k3-am6254atl-sk
Signed-off-by: Anshul Dalal <anshuld@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Link: https://patch.msgid.link/20250814134531.2743874-5-anshuld@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
This commit is contained in:
Anshul Dalal
Nishanth Menon
parent
7c1d13a14e
commit
2517e476b8
@ -28,6 +28,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am62x-phyboard-lyra-gpio-fan.dtbo
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dtb-$(CONFIG_ARCH_K3) += k3-am62-lp-sk.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am62-lp-sk-nand.dtbo
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dtb-$(CONFIG_ARCH_K3) += k3-am62-pocketbeagle2.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am6254atl-sk.dtb
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# Boards with AM62Ax SoC
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dtb-$(CONFIG_ARCH_K3) += k3-am62a7-sk.dtb
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296
arch/arm64/boot/dts/ti/k3-am625-sk-common.dtsi
Normal file
296
arch/arm64/boot/dts/ti/k3-am625-sk-common.dtsi
Normal file
@ -0,0 +1,296 @@
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// SPDX-License-Identifier: GPL-2.0-only OR MIT
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/*
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* Common dtsi for AM625 SK and derivatives
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*
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* Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
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*/
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#include "k3-am62x-sk-common.dtsi"
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/ {
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opp-table {
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/* Add 1.4GHz OPP for am625-sk board. Requires VDD_CORE to be at 0.85V */
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opp-1400000000 {
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opp-hz = /bits/ 64 <1400000000>;
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opp-supported-hw = <0x01 0x0004>;
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clock-latency-ns = <6000000>;
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};
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};
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vmain_pd: regulator-0 {
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/* TPS65988 PD CONTROLLER OUTPUT */
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compatible = "regulator-fixed";
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regulator-name = "vmain_pd";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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regulator-boot-on;
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bootph-all;
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};
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vcc_5v0: regulator-1 {
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/* Output of LM34936 */
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compatible = "regulator-fixed";
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regulator-name = "vcc_5v0";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vmain_pd>;
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regulator-always-on;
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regulator-boot-on;
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bootph-all;
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};
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vcc_3v3_sys: regulator-2 {
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/* output of LM61460-Q1 */
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compatible = "regulator-fixed";
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regulator-name = "vcc_3v3_sys";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vmain_pd>;
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regulator-always-on;
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regulator-boot-on;
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bootph-all;
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};
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vdd_mmc1: regulator-3 {
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/* TPS22918DBVR */
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compatible = "regulator-fixed";
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regulator-name = "vdd_mmc1";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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enable-active-high;
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vin-supply = <&vcc_3v3_sys>;
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gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
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bootph-all;
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};
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vdd_sd_dv: regulator-4 {
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/* Output of TLV71033 */
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compatible = "regulator-gpio";
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regulator-name = "tlv71033";
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pinctrl-names = "default";
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pinctrl-0 = <&vdd_sd_dv_pins_default>;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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vin-supply = <&vcc_5v0>;
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gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>;
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states = <1800000 0x0>,
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<3300000 0x1>;
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bootph-all;
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};
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vcc_1v8: regulator-5 {
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/* output of TPS6282518DMQ */
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compatible = "regulator-fixed";
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regulator-name = "vcc_1v8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&vcc_3v3_sys>;
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regulator-always-on;
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regulator-boot-on;
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};
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};
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&main_pmx0 {
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main_mmc0_pins_default: main-mmc0-default-pins {
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bootph-all;
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pinctrl-single,pins = <
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AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */
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AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */
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AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */
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AM62X_IOPAD(0x210, PIN_INPUT_PULLUP, 0) /* (AA1) MMC0_DAT1 */
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AM62X_IOPAD(0x20c, PIN_INPUT_PULLUP, 0) /* (AA3) MMC0_DAT2 */
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AM62X_IOPAD(0x208, PIN_INPUT_PULLUP, 0) /* (Y4) MMC0_DAT3 */
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AM62X_IOPAD(0x204, PIN_INPUT_PULLUP, 0) /* (AB2) MMC0_DAT4 */
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AM62X_IOPAD(0x200, PIN_INPUT_PULLUP, 0) /* (AC1) MMC0_DAT5 */
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AM62X_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (AD2) MMC0_DAT6 */
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AM62X_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AC2) MMC0_DAT7 */
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>;
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};
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main_rgmii2_pins_default: main-rgmii2-default-pins {
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bootph-all;
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pinctrl-single,pins = <
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AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */
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AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */
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AM62X_IOPAD(0x18c, PIN_INPUT, 0) /* (AC21) RGMII2_RD2 */
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AM62X_IOPAD(0x190, PIN_INPUT, 0) /* (AE22) RGMII2_RD3 */
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AM62X_IOPAD(0x180, PIN_INPUT, 0) /* (AD23) RGMII2_RXC */
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AM62X_IOPAD(0x17c, PIN_INPUT, 0) /* (AD22) RGMII2_RX_CTL */
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AM62X_IOPAD(0x16c, PIN_OUTPUT, 0) /* (Y18) RGMII2_TD0 */
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AM62X_IOPAD(0x170, PIN_OUTPUT, 0) /* (AA18) RGMII2_TD1 */
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AM62X_IOPAD(0x174, PIN_OUTPUT, 0) /* (AD21) RGMII2_TD2 */
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AM62X_IOPAD(0x178, PIN_OUTPUT, 0) /* (AC20) RGMII2_TD3 */
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AM62X_IOPAD(0x168, PIN_OUTPUT, 0) /* (AE21) RGMII2_TXC */
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AM62X_IOPAD(0x164, PIN_OUTPUT, 0) /* (AA19) RGMII2_TX_CTL */
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>;
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};
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ospi0_pins_default: ospi0-default-pins {
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bootph-all;
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pinctrl-single,pins = <
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AM62X_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */
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AM62X_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */
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AM62X_IOPAD(0x00c, PIN_INPUT, 0) /* (E25) OSPI0_D0 */
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AM62X_IOPAD(0x010, PIN_INPUT, 0) /* (G24) OSPI0_D1 */
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AM62X_IOPAD(0x014, PIN_INPUT, 0) /* (F25) OSPI0_D2 */
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AM62X_IOPAD(0x018, PIN_INPUT, 0) /* (F24) OSPI0_D3 */
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AM62X_IOPAD(0x01c, PIN_INPUT, 0) /* (J23) OSPI0_D4 */
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AM62X_IOPAD(0x020, PIN_INPUT, 0) /* (J25) OSPI0_D5 */
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AM62X_IOPAD(0x024, PIN_INPUT, 0) /* (H25) OSPI0_D6 */
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AM62X_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */
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AM62X_IOPAD(0x008, PIN_INPUT, 0) /* (J24) OSPI0_DQS */
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>;
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};
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vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
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pinctrl-single,pins = <
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AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (P25) GPMC0_CLK.GPIO0_31 */
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>;
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bootph-all;
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};
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main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins {
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pinctrl-single,pins = <
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AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */
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>;
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bootph-all;
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};
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};
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&main_gpio0 {
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bootph-all;
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};
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&main_gpio1 {
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bootph-all;
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};
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&main_i2c1 {
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exp1: gpio@22 {
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compatible = "ti,tca6424";
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reg = <0x22>;
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pinctrl-names = "default";
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pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>;
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interrupt-parent = <&main_gpio1>;
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interrupts = <23 IRQ_TYPE_EDGE_FALLING>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST",
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"PRU_DETECT", "MMC1_SD_EN",
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"VPP_LDO_EN", "EXP_PS_3V3_En",
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"EXP_PS_5V0_En", "EXP_HAT_DETECT",
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"GPIO_AUD_RSTn", "GPIO_eMMC_RSTn",
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"UART1_FET_BUF_EN", "WL_LT_EN",
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"GPIO_HDMI_RSTn", "CSI_GPIO1",
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"CSI_GPIO2", "PRU_3V3_EN",
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"HDMI_INTn", "PD_I2C_IRQ",
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"MCASP1_FET_EN", "MCASP1_BUF_BT_EN",
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"MCASP1_FET_SEL", "UART1_FET_SEL",
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"TSINT#", "IO_EXP_TEST_LED";
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bootph-all;
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};
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};
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&sdhci0 {
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bootph-all;
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&main_mmc0_pins_default>;
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disable-wp;
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};
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&sdhci1 {
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vmmc-supply = <&vdd_mmc1>;
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vqmmc-supply = <&vdd_sd_dv>;
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};
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&cpsw3g {
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pinctrl-names = "default";
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pinctrl-0 = <&main_rgmii1_pins_default>, <&main_rgmii2_pins_default>;
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};
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&cpsw_port2 {
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/* PCB provides an internal delay of 2ns */
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phy-mode = "rgmii-rxid";
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phy-handle = <&cpsw3g_phy1>;
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};
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&cpsw3g_mdio {
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cpsw3g_phy1: ethernet-phy@1 {
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reg = <1>;
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ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
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ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
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ti,min-output-impedance;
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};
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};
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&fss {
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bootph-all;
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};
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&ospi0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&ospi0_pins_default>;
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0x0>;
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spi-tx-bus-width = <8>;
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spi-rx-bus-width = <8>;
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spi-max-frequency = <25000000>;
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cdns,tshsl-ns = <60>;
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cdns,tsd2d-ns = <60>;
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cdns,tchsh-ns = <60>;
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cdns,tslch-ns = <60>;
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cdns,read-delay = <4>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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bootph-all;
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partition@0 {
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label = "ospi.tiboot3";
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reg = <0x0 0x80000>;
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};
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partition@80000 {
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label = "ospi.tispl";
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reg = <0x80000 0x200000>;
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};
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partition@280000 {
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label = "ospi.u-boot";
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reg = <0x280000 0x400000>;
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};
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partition@680000 {
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label = "ospi.env";
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reg = <0x680000 0x40000>;
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};
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partition@6c0000 {
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label = "ospi.env.backup";
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reg = <0x6c0000 0x40000>;
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};
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partition@800000 {
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label = "ospi.rootfs";
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reg = <0x800000 0x37c0000>;
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};
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partition@3fc0000 {
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bootph-pre-ram;
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label = "ospi.phypattern";
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reg = <0x3fc0000 0x40000>;
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};
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};
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};
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};
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@ -8,310 +8,16 @@
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/dts-v1/;
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#include "k3-am625.dtsi"
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#include "k3-am62x-sk-common.dtsi"
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#include "k3-am625-sk-common.dtsi"
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/ {
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compatible = "ti,am625-sk", "ti,am625";
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model = "Texas Instruments AM625 SK";
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opp-table {
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/* Add 1.4GHz OPP for am625-sk board. Requires VDD_CORE to be at 0.85V */
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opp-1400000000 {
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opp-hz = /bits/ 64 <1400000000>;
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opp-supported-hw = <0x01 0x0004>;
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clock-latency-ns = <6000000>;
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};
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};
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memory@80000000 {
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/* 2G RAM */
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reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
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device_type = "memory";
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bootph-pre-ram;
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};
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vmain_pd: regulator-0 {
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/* TPS65988 PD CONTROLLER OUTPUT */
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bootph-all;
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compatible = "regulator-fixed";
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regulator-name = "vmain_pd";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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regulator-boot-on;
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};
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vcc_5v0: regulator-1 {
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/* Output of LM34936 */
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bootph-all;
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compatible = "regulator-fixed";
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regulator-name = "vcc_5v0";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vmain_pd>;
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regulator-always-on;
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regulator-boot-on;
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};
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vcc_3v3_sys: regulator-2 {
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/* output of LM61460-Q1 */
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bootph-all;
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compatible = "regulator-fixed";
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regulator-name = "vcc_3v3_sys";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vmain_pd>;
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regulator-always-on;
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regulator-boot-on;
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};
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vdd_mmc1: regulator-3 {
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/* TPS22918DBVR */
|
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bootph-all;
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compatible = "regulator-fixed";
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regulator-name = "vdd_mmc1";
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regulator-min-microvolt = <3300000>;
|
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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enable-active-high;
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vin-supply = <&vcc_3v3_sys>;
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gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
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};
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vdd_sd_dv: regulator-4 {
|
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/* Output of TLV71033 */
|
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bootph-all;
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compatible = "regulator-gpio";
|
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regulator-name = "tlv71033";
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pinctrl-names = "default";
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pinctrl-0 = <&vdd_sd_dv_pins_default>;
|
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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vin-supply = <&vcc_5v0>;
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gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>;
|
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states = <1800000 0x0>,
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<3300000 0x1>;
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};
|
||||
|
||||
vcc_1v8: regulator-5 {
|
||||
/* output of TPS6282518DMQ */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_1v8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
vin-supply = <&vcc_3v3_sys>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
};
|
||||
|
||||
&main_pmx0 {
|
||||
main_mmc0_pins_default: main-mmc0-default-pins {
|
||||
bootph-all;
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */
|
||||
AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */
|
||||
AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */
|
||||
AM62X_IOPAD(0x210, PIN_INPUT_PULLUP, 0) /* (AA1) MMC0_DAT1 */
|
||||
AM62X_IOPAD(0x20c, PIN_INPUT_PULLUP, 0) /* (AA3) MMC0_DAT2 */
|
||||
AM62X_IOPAD(0x208, PIN_INPUT_PULLUP, 0) /* (Y4) MMC0_DAT3 */
|
||||
AM62X_IOPAD(0x204, PIN_INPUT_PULLUP, 0) /* (AB2) MMC0_DAT4 */
|
||||
AM62X_IOPAD(0x200, PIN_INPUT_PULLUP, 0) /* (AC1) MMC0_DAT5 */
|
||||
AM62X_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (AD2) MMC0_DAT6 */
|
||||
AM62X_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AC2) MMC0_DAT7 */
|
||||
>;
|
||||
};
|
||||
|
||||
main_rgmii2_pins_default: main-rgmii2-default-pins {
|
||||
bootph-all;
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */
|
||||
AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */
|
||||
AM62X_IOPAD(0x18c, PIN_INPUT, 0) /* (AC21) RGMII2_RD2 */
|
||||
AM62X_IOPAD(0x190, PIN_INPUT, 0) /* (AE22) RGMII2_RD3 */
|
||||
AM62X_IOPAD(0x180, PIN_INPUT, 0) /* (AD23) RGMII2_RXC */
|
||||
AM62X_IOPAD(0x17c, PIN_INPUT, 0) /* (AD22) RGMII2_RX_CTL */
|
||||
AM62X_IOPAD(0x16c, PIN_OUTPUT, 0) /* (Y18) RGMII2_TD0 */
|
||||
AM62X_IOPAD(0x170, PIN_OUTPUT, 0) /* (AA18) RGMII2_TD1 */
|
||||
AM62X_IOPAD(0x174, PIN_OUTPUT, 0) /* (AD21) RGMII2_TD2 */
|
||||
AM62X_IOPAD(0x178, PIN_OUTPUT, 0) /* (AC20) RGMII2_TD3 */
|
||||
AM62X_IOPAD(0x168, PIN_OUTPUT, 0) /* (AE21) RGMII2_TXC */
|
||||
AM62X_IOPAD(0x164, PIN_OUTPUT, 0) /* (AA19) RGMII2_TX_CTL */
|
||||
>;
|
||||
};
|
||||
|
||||
ospi0_pins_default: ospi0-default-pins {
|
||||
bootph-all;
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */
|
||||
AM62X_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */
|
||||
AM62X_IOPAD(0x00c, PIN_INPUT, 0) /* (E25) OSPI0_D0 */
|
||||
AM62X_IOPAD(0x010, PIN_INPUT, 0) /* (G24) OSPI0_D1 */
|
||||
AM62X_IOPAD(0x014, PIN_INPUT, 0) /* (F25) OSPI0_D2 */
|
||||
AM62X_IOPAD(0x018, PIN_INPUT, 0) /* (F24) OSPI0_D3 */
|
||||
AM62X_IOPAD(0x01c, PIN_INPUT, 0) /* (J23) OSPI0_D4 */
|
||||
AM62X_IOPAD(0x020, PIN_INPUT, 0) /* (J25) OSPI0_D5 */
|
||||
AM62X_IOPAD(0x024, PIN_INPUT, 0) /* (H25) OSPI0_D6 */
|
||||
AM62X_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */
|
||||
AM62X_IOPAD(0x008, PIN_INPUT, 0) /* (J24) OSPI0_DQS */
|
||||
>;
|
||||
};
|
||||
|
||||
vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
|
||||
bootph-all;
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (P25) GPMC0_CLK.GPIO0_31 */
|
||||
>;
|
||||
};
|
||||
|
||||
main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins {
|
||||
bootph-all;
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&main_gpio0 {
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_gpio1 {
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_i2c1 {
|
||||
bootph-all;
|
||||
exp1: gpio@22 {
|
||||
bootph-all;
|
||||
compatible = "ti,tca6424";
|
||||
reg = <0x22>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST",
|
||||
"PRU_DETECT", "MMC1_SD_EN",
|
||||
"VPP_LDO_EN", "EXP_PS_3V3_En",
|
||||
"EXP_PS_5V0_En", "EXP_HAT_DETECT",
|
||||
"GPIO_AUD_RSTn", "GPIO_eMMC_RSTn",
|
||||
"UART1_FET_BUF_EN", "WL_LT_EN",
|
||||
"GPIO_HDMI_RSTn", "CSI_GPIO1",
|
||||
"CSI_GPIO2", "PRU_3V3_EN",
|
||||
"HDMI_INTn", "PD_I2C_IRQ",
|
||||
"MCASP1_FET_EN", "MCASP1_BUF_BT_EN",
|
||||
"MCASP1_FET_SEL", "UART1_FET_SEL",
|
||||
"TSINT#", "IO_EXP_TEST_LED";
|
||||
|
||||
interrupt-parent = <&main_gpio1>;
|
||||
interrupts = <23 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>;
|
||||
};
|
||||
};
|
||||
|
||||
&sdhci0 {
|
||||
bootph-all;
|
||||
non-removable;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_mmc0_pins_default>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdhci1 {
|
||||
vmmc-supply = <&vdd_mmc1>;
|
||||
vqmmc-supply = <&vdd_sd_dv>;
|
||||
};
|
||||
|
||||
&cpsw3g {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_rgmii1_pins_default>, <&main_rgmii2_pins_default>;
|
||||
};
|
||||
|
||||
&cpsw_port2 {
|
||||
phy-mode = "rgmii-rxid";
|
||||
phy-handle = <&cpsw3g_phy1>;
|
||||
};
|
||||
|
||||
&cpsw3g_mdio {
|
||||
cpsw3g_phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
|
||||
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
|
||||
ti,min-output-impedance;
|
||||
};
|
||||
};
|
||||
|
||||
&fss {
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&ospi0 {
|
||||
bootph-all;
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ospi0_pins_default>;
|
||||
|
||||
flash@0 {
|
||||
bootph-all;
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0x0>;
|
||||
spi-tx-bus-width = <8>;
|
||||
spi-rx-bus-width = <8>;
|
||||
spi-max-frequency = <25000000>;
|
||||
cdns,tshsl-ns = <60>;
|
||||
cdns,tsd2d-ns = <60>;
|
||||
cdns,tchsh-ns = <60>;
|
||||
cdns,tslch-ns = <60>;
|
||||
cdns,read-delay = <4>;
|
||||
|
||||
partitions {
|
||||
bootph-all;
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "ospi.tiboot3";
|
||||
reg = <0x0 0x80000>;
|
||||
};
|
||||
|
||||
partition@80000 {
|
||||
label = "ospi.tispl";
|
||||
reg = <0x80000 0x200000>;
|
||||
};
|
||||
|
||||
partition@280000 {
|
||||
label = "ospi.u-boot";
|
||||
reg = <0x280000 0x400000>;
|
||||
};
|
||||
|
||||
partition@680000 {
|
||||
label = "ospi.env";
|
||||
reg = <0x680000 0x40000>;
|
||||
};
|
||||
|
||||
partition@6c0000 {
|
||||
label = "ospi.env.backup";
|
||||
reg = <0x6c0000 0x40000>;
|
||||
};
|
||||
|
||||
partition@800000 {
|
||||
label = "ospi.rootfs";
|
||||
reg = <0x800000 0x37c0000>;
|
||||
};
|
||||
|
||||
partition@3fc0000 {
|
||||
bootph-pre-ram;
|
||||
label = "ospi.phypattern";
|
||||
reg = <0x3fc0000 0x40000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&tlv320aic3106 {
|
||||
DVDD-supply = <&vcc_1v8>;
|
||||
};
|
||||
|
||||
15
arch/arm64/boot/dts/ti/k3-am6254atl-sk.dts
Normal file
15
arch/arm64/boot/dts/ti/k3-am6254atl-sk.dts
Normal file
@ -0,0 +1,15 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-only OR MIT
|
||||
/*
|
||||
* AM6254atl SiP SK: https://www.ti.com/lit/df/sprr482b/sprr482b.zip
|
||||
* Webpage: https://www.ti.com/tool/SK-AM62-SIP
|
||||
*
|
||||
* Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
|
||||
*/
|
||||
|
||||
#include "k3-am6254atl.dtsi"
|
||||
#include "k3-am625-sk-common.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Texas Instruments AM6254atl SK";
|
||||
compatible = "ti,am6254atl-sk", "ti,am6254atl", "ti,am625";
|
||||
};
|
||||
Loading…
x
Reference in New Issue
Block a user