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TI K3 device tree updates for v6.19

Browse Source 
Generic fixes and cleanups:
 * Multiple SoCs: Disable CPSW in SoC files and
   enable them in board files for better board-level control
 * Replace rgmii-rxid with rgmii-id for CPSW ports across multiple boards
 
 New Boards/SoM:
 * AM62L SoC and basic support for EVM
 * Toradex Aquila AM69 board support
 * Kontron SMARC-sAM67 module and ADS2 carrier board support
 
 Platform wide:
 * Define possible system states amd wakeup-source (AM62/AM62A/AM62P)
 
 SoC/EVM specific changes:
 AM62:
 * Add RNG node
 * Add OLDI support
 
 AM62P:
 * Move audio_refclk to common main dtsi (k3-am62p-j722s-common-main)
 * Fix memory ranges for GPU
 
 AM62D2:
 * Enable PMIC support on EVM
 * Misc fixes
 
 AM64:
 * Add DMA support for TSCADC on EVM
 
 AM69:
 * Add Aquila board support with Clover variant
 
 J722S:
 * Fix audio refclk source in main dtsi
 * Explicitly use PLL1_HSDIV6 audio refclk for EVM
 
 J784S4/J742S2:
 * Add bootph-all tag to support PCIe boot
 
 Variscite VAR-SOM-AM62P:
 * Add support for ADS7846 touchscreen
 * Add support for WM8904 audio codec
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Merge tag 'ti-k3-dt-for-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt

TI K3 device tree updates for v6.19

Generic fixes and cleanups:
* Multiple SoCs: Disable CPSW in SoC files and
  enable them in board files for better board-level control
* Replace rgmii-rxid with rgmii-id for CPSW ports across multiple boards

New Boards/SoM:
* AM62L SoC and basic support for EVM
* Toradex Aquila AM69 board support
* Kontron SMARC-sAM67 module and ADS2 carrier board support

Platform wide:
* Define possible system states amd wakeup-source (AM62/AM62A/AM62P)

SoC/EVM specific changes:
AM62:
* Add RNG node
* Add OLDI support

AM62P:
* Move audio_refclk to common main dtsi (k3-am62p-j722s-common-main)
* Fix memory ranges for GPU

AM62D2:
* Enable PMIC support on EVM
* Misc fixes

AM64:
* Add DMA support for TSCADC on EVM

AM69:
* Add Aquila board support with Clover variant

J722S:
* Fix audio refclk source in main dtsi
* Explicitly use PLL1_HSDIV6 audio refclk for EVM

J784S4/J742S2:
* Add bootph-all tag to support PCIe boot

Variscite VAR-SOM-AM62P:
* Add support for ADS7846 touchscreen
* Add support for WM8904 audio codec

* tag 'ti-k3-dt-for-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (42 commits)
  arm64: dts: ti: k3-am62l: add initial reference board file
  arm64: dts: ti: k3-am62l: add initial infrastructure
  dt-bindings: arm: ti: Add binding for AM62L SoCs
  arm64: dts: ti: am69-aquila: Add Clover
  arm64: dts: ti: Add Aquila AM69 Support
  dt-bindings: arm: ti: add Toradex Aquila AM69
  arm64: dts: ti: k3-j721s2: disable "mcu_cpsw" in SoC file and enable in board files
  arm64: dts: ti: k3-j721e: disable "mcu_cpsw" in SoC file and enable it in board file
  arm64: dts: ti: k3-j7200: disable "mcu_cpsw" in SoC file and enable in board file
  arm64: dts: ti: k3-am65: disable "mcu_cpsw" in SoC file and enable in board file
  arm64: dts: ti: k3-am62: disable "cpsw3g" in SoC file and enable in board file
  arm64: dts: ti: k3-am62p5-sk: Set wakeup-source system-states
  arm64: dts: ti: k3-am62a7-sk: Set wakeup-source system-states
  arm64: dts: ti: k3-am62-lp-sk: Set wakeup-source system-states
  arm64: dts: ti: k3-am62p: Define possible system states
  arm64: dts: ti: k3-am62a: Define possible system states
  arm64: dts: ti: k3-am62: Define possible system states
  arm64: dts: ti: k3-am62p-j722s-common-main: move audio_refclk here
  arm64: dts: ti: k3-*: Replace rgmii-rxid with rgmii-id for CPSW ports
  arm64: dts: ti: k3-am642-tqma64xxl: add boot phase tags
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2025-11-21 17:15:07 +01:00
commit 287df51938
67 changed files with 6203 additions and 149 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
Documentation/devicetree/bindings/arm/ti/k3.yaml
View File

@ -37,6 +37,12 @@ properties:
- const: phytec,am62a-phycore-som
- const: ti,am62a7
- description: K3 AM62L3 SoC and Boards
items:
- enum:
- ti,am62l3-evm
- const: ti,am62l3
- description: K3 AM62P5 SoC and Boards
items:
- enum:
@ -158,6 +164,14 @@ properties:
- ti,am654-evm
- const: ti,am654
- description: K3 AM69 SoC Toradex Aquila Modules and Carrier Boards
items:
- enum:
- toradex,aquila-am69-clover # Aquila AM69 Module on Clover Board
- toradex,aquila-am69-dev # Aquila AM69 Module on Aquila Development Board
- const: toradex,aquila-am69 # Aquila AM69 Module
- const: ti,j784s4
- description: K3 J7200 SoC
oneOf:
- const: ti,j7200
@ -194,6 +208,7 @@ properties:
items:
- enum:
- beagle,am67a-beagley-ai
- kontron,sa67 # Kontron SMARC-sAM67 board
- ti,j722s-evm
- const: ti,j722s

15
arch/arm64/boot/dts/ti/Makefile
View File

@ -37,6 +37,9 @@ dtb-$(CONFIG_ARCH_K3) += k3-am62a7-phyboard-lyra-rdk.dtb
# Boards with AM62Dx SoC
dtb-$(CONFIG_ARCH_K3) += k3-am62d2-evm.dtb
# Boards with AM62Lx SoCs
dtb-$(CONFIG_ARCH_K3) += k3-am62l3-evm.dtb
# Boards with AM62Px SoC
dtb-$(CONFIG_ARCH_K3) += k3-am62p5-sk.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am62p5-var-som-symphony.dtb
@ -137,12 +140,24 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-pcie1-ep.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-usb0-type-a.dtbo
# Boards with J722s SoC
k3-am67a-kontron-sa67-dtbs := k3-am67a-kontron-sa67-base.dtb \
k3-am67a-kontron-sa67-rtc-rv8263.dtbo k3-am67a-kontron-sa67-gbe1.dtbo
k3-am67a-kontron-sa67-ads2-dtbs := k3-am67a-kontron-sa67.dtb k3-am67a-kontron-sa67-ads2.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-am67a-beagley-ai.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am67a-kontron-sa67.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am67a-kontron-sa67-base.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am67a-kontron-sa67-gbe1.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-am67a-kontron-sa67-gpios.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-am67a-kontron-sa67-rtc-rv8263.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-am67a-kontron-sa67-ads2.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am67a-kontron-sa67-ads2.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm.dtb
dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo
# Boards with J784s4 SoC
dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-clover.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dev.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am69-sk-pcie0-ep.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb

64
arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts
View File

@ -181,6 +181,10 @@
vqmmc-supply = <&vddshv_sdio>;
};
&cpsw3g {
status = "okay";
};
&cpsw_port2 {
status = "disabled";
};
@ -276,3 +280,63 @@
&gpmc0 {
ranges = <0 0 0x00 0x51000000 0x01000000>; /* CS0 space. Min partition = 16MB */
};
&mcu_mcan0 {
pinctrl-names = "default", "wakeup";
pinctrl-0 = <&mcu_mcan0_tx_pins_default>, <&mcu_mcan0_rx_pins_default>;
pinctrl-1 = <&mcu_mcan0_tx_pins_default>, <&mcu_mcan0_rx_pins_wakeup>;
wakeup-source = <&system_partial_io>,
<&system_deep_sleep>,
<&system_mcu_only>,
<&system_standby>;
status = "okay";
};
&mcu_mcan1 {
pinctrl-names = "default", "wakeup";
pinctrl-0 = <&mcu_mcan1_tx_pins_default>, <&mcu_mcan1_rx_pins_default>;
pinctrl-1 = <&mcu_mcan1_tx_pins_default>, <&mcu_mcan1_rx_pins_wakeup>;
wakeup-source = <&system_partial_io>,
<&system_deep_sleep>,
<&system_mcu_only>,
<&system_standby>;
status = "okay";
};
&mcu_pmx0 {
mcu_mcan0_tx_pins_default: mcu-mcan0-tx-default-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x034, PIN_OUTPUT, 0) /* (D6) MCU_MCAN0_TX */
>;
};
mcu_mcan0_rx_pins_default: mcu-mcan0-rx-default-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x038, PIN_INPUT, 0) /* (B3) MCU_MCAN0_RX */
>;
};
mcu_mcan0_rx_pins_wakeup: mcu-mcan0-rx-wakeup-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x038, PIN_INPUT | PIN_WKUP_EN, 0) /* (B3) MCU_MCAN0_RX */
>;
};
mcu_mcan1_tx_pins_default: mcu-mcan1-tx-default-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x03c, PIN_OUTPUT, 0) /* (E5) MCU_MCAN1_TX */
>;
};
mcu_mcan1_rx_pins_default: mcu-mcan1-rx-default-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x040, PIN_INPUT, 0) /* (D4) MCU_MCAN1_RX */
>;
};
mcu_mcan1_rx_pins_wakeup: mcu-mcan1-rx-wakeup-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x040, PIN_INPUT | PIN_WKUP_EN, 0) /* (D4) MCU_MCAN1_RX */
>;
};
};

64
arch/arm64/boot/dts/ti/k3-am62-main.dtsi
View File

@ -76,6 +76,11 @@
assigned-clock-parents = <&k3_clks 157 18>;
#clock-cells = <0>;
};
dss_oldi_io_ctrl: oldi-io-controller@8600 {
compatible = "ti,am625-dss-oldi-io-ctrl", "syscon";
reg = <0x8600 0x200>;
};
};
dmss: bus@48000000 {
@ -209,6 +214,16 @@
dmas = <&main_pktdma 0xf501 0>, <&main_pktdma 0x7506 0>,
<&main_pktdma 0x7507 0>;
dma-names = "tx", "rx1", "rx2";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x00 0x40900000 0x00 0x40900000 0x00 0x30000>;
rng: rng@40910000 {
compatible = "inside-secure,safexcel-eip76";
reg = <0x00 0x40910000 0x00 0x7d>;
interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
status = "reserved"; /* Reserved for OP-TEE */
};
};
secure_proxy_sa3: mailbox@43600000 {
@ -723,6 +738,8 @@
dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6",
"tx7", "rx";
status = "disabled";
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
@ -788,6 +805,53 @@
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
oldi-transmitters {
#address-cells = <1>;
#size-cells = <0>;
oldi0: oldi@0 {
reg = <0>;
clocks = <&k3_clks 186 0>;
clock-names = "serial";
ti,oldi-io-ctrl = <&dss_oldi_io_ctrl>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
oldi0_port0: port@0 {
reg = <0>;
};
oldi0_port1: port@1 {
reg = <1>;
};
};
};
oldi1: oldi@1 {
reg = <1>;
clocks = <&k3_clks 186 0>;
clock-names = "serial";
ti,oldi-io-ctrl = <&dss_oldi_io_ctrl>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
oldi1_port0: port@0 {
reg = <0>;
};
oldi1_port1: port@1 {
reg = <1>;
};
};
};
};
dss_ports: ports {
#address-cells = <1>;
#size-cells = <0>;

3
arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi
View File

@ -211,10 +211,11 @@
&cpsw3g {
pinctrl-names = "default";
pinctrl-0 = <&main_rgmii1_pins_default>;
status = "okay";
};
&cpsw_port1 {
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
phy-handle = <&cpsw3g_phy1>;
bootph-all;
};

2
arch/arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi
View File

@ -74,7 +74,7 @@
/* Verdin ETH_2_RGMII */
&cpsw_port2 {
phy-handle = <&cpsw3g_phy1>;
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
status = "okay";
};

2
arch/arm64/boot/dts/ti/k3-am62-verdin-ivy.dtsi
View File

@ -268,7 +268,7 @@
/* Verdin ETH_2_RGMII */
&cpsw_port2 {
phy-handle = <&cpsw3g_phy1>;
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
status = "okay";
};

2
arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
View File

@ -845,7 +845,7 @@
/* Verdin ETH_1 (On-module PHY) */
&cpsw_port1 {
phy-handle = <&cpsw3g_phy0>;
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
status = "disabled";
};

22
arch/arm64/boot/dts/ti/k3-am62.dtsi
View File

@ -46,6 +46,28 @@
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
};
system-idle-states {
system_partial_io: system-partial-io {
compatible = "system-idle-state";
idle-state-name = "off-wake";
};
system_deep_sleep: system-deep-sleep {
compatible = "system-idle-state";
idle-state-name = "mem";
};
system_mcu_only: system-mcu-only {
compatible = "system-idle-state";
idle-state-name = "mem-mcu-active";
};
system_standby: system-standby {
compatible = "system-idle-state";
idle-state-name = "standby";
};
};
cbass_main: bus@f0000 {
bootph-all;
compatible = "simple-bus";

3
arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts
View File

@ -590,10 +590,11 @@
<&gbe_pmx_obsclk>;
assigned-clocks = <&k3_clks 157 70>, <&k3_clks 157 20>;
assigned-clock-parents = <&k3_clks 157 72>, <&k3_clks 157 22>;
status = "okay";
};
&cpsw_port1 {
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
phy-handle = <&cpsw3g_phy0>;
};

4
arch/arm64/boot/dts/ti/k3-am625-sk-common.dtsi
View File

@ -212,11 +212,11 @@
&cpsw3g {
pinctrl-names = "default";
pinctrl-0 = <&main_rgmii1_pins_default>, <&main_rgmii2_pins_default>;
status = "okay";
};
&cpsw_port2 {
/* PCB provides an internal delay of 2ns */
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
phy-handle = <&cpsw3g_phy1>;
};

10
arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
View File

@ -247,6 +247,16 @@
dmas = <&main_pktdma 0xf501 0>, <&main_pktdma 0x7506 0>,
<&main_pktdma 0x7507 0>;
dma-names = "tx", "rx1", "rx2";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x00 0x40900000 0x00 0x40900000 0x00 0x30000>;
rng: rng@40910000 {
compatible = "inside-secure,safexcel-eip76";
reg = <0x00 0x40910000 0x00 0x7d>;
interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
status = "reserved"; /* Reserved for OP-TEE */
};
};
secure_proxy_sa3: mailbox@43600000 {

2
arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi
View File

@ -192,7 +192,7 @@
};
&cpsw_port1 {
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
phy-handle = <&cpsw3g_phy1>;
bootph-all;
};

27
arch/arm64/boot/dts/ti/k3-am62a.dtsi
View File

@ -46,6 +46,33 @@
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
};
system-idle-states {
system_partial_io: system-partial-io {
compatible = "system-idle-state";
idle-state-name = "off-wake";
};
system_io_ddr: system-io-ddr {
compatible = "system-idle-state";
idle-state-name = "mem-deep";
};
system_deep_sleep: system-deep-sleep {
compatible = "system-idle-state";
idle-state-name = "mem";
};
system_mcu_only: system-mcu-only {
compatible = "system-idle-state";
idle-state-name = "mem-mcu-active";
};
system_standby: system-standby {
compatible = "system-idle-state";
idle-state-name = "standby";
};
};
cbass_main: bus@f0000 {
compatible = "simple-bus";
#address-cells = <2>;

71
arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
View File

@ -233,6 +233,10 @@
&wkup_uart0 {
pinctrl-names = "default";
pinctrl-0 = <&wkup_uart0_pins_default>;
wakeup-source = <&system_io_ddr>,
<&system_deep_sleep>,
<&system_mcu_only>,
<&system_standby>;
status = "reserved";
};
@ -426,6 +430,42 @@
AM62AX_MCU_IOPAD(0x000, PIN_INPUT, 7) /* (E11) MCU_GPIO0_0 */
>;
};
mcu_mcan0_tx_pins_default: mcu-mcan0-tx-default-pins {
pinctrl-single,pins = <
AM62AX_MCU_IOPAD(0x034, PIN_OUTPUT, 0) /* (D6) MCU_MCAN0_TX */
>;
};
mcu_mcan0_rx_pins_default: mcu-mcan0-rx-default-pins {
pinctrl-single,pins = <
AM62AX_MCU_IOPAD(0x038, PIN_INPUT, 0) /* (B3) MCU_MCAN0_RX */
>;
};
mcu_mcan0_rx_pins_wakeup: mcu-mcan0-rx-wakeup-pins {
pinctrl-single,pins = <
AM62AX_MCU_IOPAD(0x038, PIN_INPUT | PIN_WKUP_EN, 0) /* (B3) MCU_MCAN0_RX */
>;
};
mcu_mcan1_tx_pins_default: mcu-mcan1-tx-default-pins {
pinctrl-single,pins = <
AM62AX_MCU_IOPAD(0x03c, PIN_OUTPUT, 0) /* (E5) MCU_MCAN1_TX */
>;
};
mcu_mcan1_rx_pins_default: mcu-mcan1-rx-default-pins {
pinctrl-single,pins = <
AM62AX_MCU_IOPAD(0x040, PIN_INPUT, 0) /* (D4) MCU_MCAN1_RX */
>;
};
mcu_mcan1_rx_pins_wakeup: mcu-mcan1-rx-wakeup-pins {
pinctrl-single,pins = <
AM62AX_MCU_IOPAD(0x040, PIN_INPUT | PIN_WKUP_EN, 0) /* (D4) MCU_MCAN1_RX */
>;
};
};
&mcu_gpio0 {
@ -731,7 +771,7 @@
&cpsw_port1 {
status = "okay";
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
phy-handle = <&cpsw3g_phy0>;
bootph-all;
};
@ -852,4 +892,33 @@
};
};
&mcu_mcan0 {
pinctrl-names = "default", "wakeup";
pinctrl-0 = <&mcu_mcan0_tx_pins_default>, <&mcu_mcan0_rx_pins_default>;
pinctrl-1 = <&mcu_mcan0_tx_pins_default>, <&mcu_mcan0_rx_pins_wakeup>;
wakeup-source = <&system_partial_io>,
<&system_io_ddr>,
<&system_deep_sleep>,
<&system_mcu_only>,
<&system_standby>;
};
&mcu_mcan1 {
pinctrl-names = "default", "wakeup";
pinctrl-0 = <&mcu_mcan1_tx_pins_default>, <&mcu_mcan1_rx_pins_default>;
pinctrl-1 = <&mcu_mcan1_tx_pins_default>, <&mcu_mcan1_rx_pins_wakeup>;
wakeup-source = <&system_partial_io>,
<&system_io_ddr>,
<&system_deep_sleep>,
<&system_mcu_only>,
<&system_standby>;
};
&mcu_uart0 {
wakeup-source = <&system_io_ddr>,
<&system_deep_sleep>,
<&system_mcu_only>,
<&system_standby>;
};
#include "k3-am62a-ti-ipc-firmware.dtsi"

103
arch/arm64/boot/dts/ti/k3-am62d2-evm.dts
View File

@ -146,6 +146,7 @@
regulator-name = "vdd_mmc1";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_3v3_sys>;
regulator-boot-on;
enable-active-high;
gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
@ -165,14 +166,16 @@
};
vddshv_sdio: regulator-6 {
/* output of TLV7103318QDSERQ1 */
compatible = "regulator-gpio";
regulator-name = "vddshv_sdio";
pinctrl-names = "default";
pinctrl-0 = <&vddshv_sdio_pins_default>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_5v0>;
regulator-boot-on;
gpios = <&main_gpio1 31 GPIO_ACTIVE_HIGH>;
gpios = <&main_gpio0 59 GPIO_ACTIVE_HIGH>;
states = <1800000 0x0>,
<3300000 0x1>;
bootph-all;
@ -198,7 +201,7 @@
pmic_irq_pins_default: pmic-irq-default-pins {
pinctrl-single,pins = <
AM62DX_MCU_IOPAD(0x000, PIN_INPUT, 7) /* (E11) MCU_GPIO0_0 */
AM62DX_IOPAD(0x01f4, PIN_INPUT, 7) /* (F17) EXTINTn.GPIO1_31 */
>;
};
@ -211,6 +214,14 @@
>;
bootph-all;
};
wkup_i2c0_pins_default: wkup-i2c0-default-pins {
pinctrl-single,pins = <
AM62DX_MCU_IOPAD(0x004c, PIN_INPUT, 0) /* (D13) WKUP_I2C0_SCL */
AM62DX_MCU_IOPAD(0x0050, PIN_INPUT, 0) /* (E13) WKUP_I2C0_SDA */
>;
bootph-all;
};
};
/* WKUP UART0 is used for DM firmware logs */
@ -334,7 +345,7 @@
vddshv_sdio_pins_default: vddshv-sdio-default-pins {
pinctrl-single,pins = <
AM62DX_IOPAD(0x1f4, PIN_OUTPUT, 7) /* (M19) GPMC0_CLK.GPIO1_31 */
AM62DX_IOPAD(0x00f0, PIN_INPUT, 7) /* (Y21) GPIO0_59 */
>;
bootph-all;
};
@ -355,9 +366,6 @@
pinctrl-single,pins = <
AM62DX_IOPAD(0x0000, PIN_OUTPUT, 0) /* (L22) OSPI0_CLK */
AM62DX_IOPAD(0x002c, PIN_OUTPUT, 0) /* (H21) OSPI0_CSn0 */
AM62DX_IOPAD(0x0030, PIN_OUTPUT, 0) /* (G19) OSPI0_CSn1 */
AM62DX_IOPAD(0x0034, PIN_OUTPUT, 0) /* (K20) OSPI0_CSn2 */
AM62DX_IOPAD(0x0038, PIN_OUTPUT, 0) /* (G20) OSPI0_CSn3 */
AM62DX_IOPAD(0x000c, PIN_INPUT, 0) /* (J21) OSPI0_D0 */
AM62DX_IOPAD(0x0010, PIN_INPUT, 0) /* (J18) OSPI0_D1 */
AM62DX_IOPAD(0x0014, PIN_INPUT, 0) /* (J19) OSPI0_D2 */
@ -461,6 +469,89 @@
status = "okay";
};
&wkup_i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&wkup_i2c0_pins_default>;
clock-frequency = <400000>;
status = "okay";
tps65224: pmic@48 {
compatible = "ti,tps65224-q1";
reg = <0x48>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_irq_pins_default>;
interrupt-parent = <&main_gpio1>;
interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
ti,primary-pmic;
gpio-controller;
#gpio-cells = <2>;
buck12-supply = <&vcc_3v3_sys>;
buck3-supply = <&vcc_3v3_sys>;
buck4-supply = <&vcc_3v3_sys>;
ldo1-supply = <&vcc_3v3_sys>;
ldo2-supply = <&vcc_3v3_sys>;
ldo3-supply = <&vcc_3v3_sys>;
regulators {
buck12: buck12 {
regulator-name = "vdd_core";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <850000>;
regulator-boot-on;
regulator-always-on;
bootph-all;
};
buck3: buck3 {
regulator-name = "dvdd1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
bootph-all;
};
buck4: buck4 {
regulator-name = "vdds_ddr";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-boot-on;
regulator-always-on;
bootph-all;
};
ldo1: ldo1 {
regulator-name = "vdda_1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
bootph-all;
};
ldo2: ldo2 {
regulator-name = "dvdd3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
bootph-all;
};
ldo3: ldo3 {
regulator-name = "vddr_core";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <850000>;
regulator-boot-on;
regulator-always-on;
bootph-all;
};
};
};
};
&sdhci0 {
/* eMMC */
non-removable;

580
arch/arm64/boot/dts/ti/k3-am62l-main.dtsi Normal file
View File

@ -0,0 +1,580 @@
// SPDX-License-Identifier: GPL-2.0-only or MIT
/*
* Device Tree file for the AM62L main domain peripherals
* Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
*
* Technical Reference Manual: https://www.ti.com/lit/pdf/sprujb4
*/
&cbass_main {
gic500: interrupt-controller@1800000 {
compatible = "arm,gic-v3";
reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */
<0x00 0x01840000 0x00 0xc0000>, /* GICR */
<0x01 0x00000000 0x00 0x2000>, /* GICC */
<0x01 0x00010000 0x00 0x1000>, /* GICH */
<0x01 0x00020000 0x00 0x2000>; /* GICV */
ranges;
#address-cells = <2>;
#size-cells = <2>;
#interrupt-cells = <3>;
interrupt-controller;
/*
* vcpumntirq:
* virtual CPU interface maintenance interrupt
*/
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
gic_its: msi-controller@1820000 {
compatible = "arm,gic-v3-its";
reg = <0x00 0x01820000 0x00 0x10000>;
socionext,synquacer-pre-its = <0x1000000 0x400000>;
msi-controller;
#msi-cells = <1>;
};
};
gpio0: gpio@600000 {
compatible = "ti,am64-gpio", "ti,keystone-gpio";
reg = <0x00 0x00600000 0x00 0x100>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&gic500>;
interrupts = <GIC_SPI 260 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 261 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 262 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 263 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 264 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 265 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 266 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 267 IRQ_TYPE_EDGE_RISING>;
interrupt-controller;
#interrupt-cells = <2>;
power-domains = <&scmi_pds 34>;
clocks = <&scmi_clk 140>;
clock-names = "gpio";
ti,ngpio = <126>;
ti,davinci-gpio-unbanked = <0>;
};
gpio2: gpio@610000 {
compatible = "ti,am64-gpio", "ti,keystone-gpio";
reg = <0x00 0x00610000 0x00 0x100>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&gic500>;
interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 281 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 282 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 283 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 284 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 285 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 286 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 287 IRQ_TYPE_EDGE_RISING>;
interrupt-controller;
#interrupt-cells = <2>;
power-domains = <&scmi_pds 35>;
clocks = <&scmi_clk 141>;
clock-names = "gpio";
ti,ngpio = <79>;
ti,davinci-gpio-unbanked = <0>;
};
timer0: timer@2400000 {
compatible = "ti,am654-timer";
reg = <0x00 0x2400000 0x00 0x400>;
interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scmi_clk 58>;
clock-names = "fck";
power-domains = <&scmi_pds 15>;
ti,timer-pwm;
};
timer1: timer@2410000 {
compatible = "ti,am654-timer";
reg = <0x00 0x2410000 0x00 0x400>;
interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scmi_clk 63>;
clock-names = "fck";
power-domains = <&scmi_pds 16>;
ti,timer-pwm;
};
timer2: timer@2420000 {
compatible = "ti,am654-timer";
reg = <0x00 0x2420000 0x00 0x400>;
interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scmi_clk 77>;
clock-names = "fck";
power-domains = <&scmi_pds 17>;
ti,timer-pwm;
};
timer3: timer@2430000 {
compatible = "ti,am654-timer";
reg = <0x00 0x2430000 0x00 0x400>;
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scmi_clk 82>;
clock-names = "fck";
power-domains = <&scmi_pds 18>;
ti,timer-pwm;
};
uart0: serial@2800000 {
compatible = "ti,am64-uart", "ti,am654-uart";
reg = <0x00 0x02800000 0x00 0x100>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&scmi_pds 89>;
clocks = <&scmi_clk 358>;
clock-names = "fclk";
status = "disabled";
};
uart1: serial@2810000 {
compatible = "ti,am64-uart", "ti,am654-uart";
reg = <0x00 0x02810000 0x00 0x100>;
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&scmi_pds 77>;
clocks = <&scmi_clk 312>;
clock-names = "fclk";
status = "disabled";
};
uart2: serial@2820000 {
compatible = "ti,am64-uart", "ti,am654-uart";
reg = <0x00 0x02820000 0x00 0x100>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&scmi_pds 78>;
clocks = <&scmi_clk 314>;
clock-names = "fclk";
status = "disabled";
};
uart3: serial@2830000 {
compatible = "ti,am64-uart", "ti,am654-uart";
reg = <0x00 0x02830000 0x00 0x100>;
interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&scmi_pds 79>;
clocks = <&scmi_clk 316>;
clock-names = "fclk";
status = "disabled";
};
uart4: serial@2840000 {
compatible = "ti,am64-uart", "ti,am654-uart";
reg = <0x00 0x02840000 0x00 0x100>;
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&scmi_pds 80>;
clocks = <&scmi_clk 318>;
clock-names = "fclk";
status = "disabled";
};
uart5: serial@2850000 {
compatible = "ti,am64-uart", "ti,am654-uart";
reg = <0x00 0x02850000 0x00 0x100>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&scmi_pds 81>;
clocks = <&scmi_clk 320>;
clock-names = "fclk";
status = "disabled";
};
uart6: serial@2860000 {
compatible = "ti,am64-uart", "ti,am654-uart";
reg = <0x00 0x02860000 0x00 0x100>;
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&scmi_pds 82>;
clocks = <&scmi_clk 322>;
clock-names = "fclk";
status = "disabled";
};
conf: bus@9000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00 0x00 0x09000000 0x380000>;
phy_gmii_sel: phy@1be000 {
compatible = "ti,am654-phy-gmii-sel";
reg = <0x1be000 0x8>;
#phy-cells = <1>;
};
epwm_tbclk: clock-controller@1e9100 {
compatible = "ti,am62-epwm-tbclk";
reg = <0x1e9100 0x4>;
#clock-cells = <1>;
};
};
usbss0: dwc3-usb@f900000 {
compatible = "ti,am62-usb";
reg = <0x00 0x0f900000 0x00 0x800>,
<0x00 0x0f908000 0x00 0x400>;
clocks = <&scmi_clk 331>;
clock-names = "ref";
ti,syscon-phy-pll-refclk = <&usb_phy_ctrl 0x0>;
#address-cells = <2>;
#size-cells = <2>;
power-domains = <&scmi_pds 95>;
ranges;
status = "disabled";
usb0: usb@31000000 {
compatible = "snps,dwc3";
reg = <0x00 0x31000000 0x00 0x50000>;
interrupts = <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
<GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
interrupt-names = "host", "peripheral";
maximum-speed = "high-speed";
dr_mode = "otg";
snps,usb2-gadget-lpm-disable;
snps,usb2-lpm-disable;
};
};
usbss1: dwc3-usb@f910000 {
compatible = "ti,am62-usb";
reg = <0x00 0x0f910000 0x00 0x800>,
<0x00 0x0f918000 0x00 0x400>;
clocks = <&scmi_clk 338>;
clock-names = "ref";
ti,syscon-phy-pll-refclk = <&usb_phy_ctrl 0x4>;
#address-cells = <2>;
#size-cells = <2>;
power-domains = <&scmi_pds 96>;
ranges;
status = "disabled";
usb1: usb@31100000 {
compatible = "snps,dwc3";
reg = <0x00 0x31100000 0x00 0x50000>;
interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
<GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
interrupt-names = "host", "peripheral";
maximum-speed = "high-speed";
dr_mode = "otg";
snps,usb2-gadget-lpm-disable;
snps,usb2-lpm-disable;
};
};
sdhci1: mmc@fa00000 {
compatible = "ti,j721e-sdhci-4bit";
reg = <0x00 0x0fa00000 0x00 0x1000>,
<0x00 0x0fa08000 0x00 0x400>;
interrupts = <GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&scmi_pds 26>;
clocks = <&scmi_clk 106>, <&scmi_clk 109>;
clock-names = "clk_ahb", "clk_xin";
assigned-clocks = <&scmi_clk 109>;
bus-width = <4>;
ti,clkbuf-sel = <0x7>;
ti,otap-del-sel-legacy = <0x0>;
ti,itap-del-sel-legacy = <0x0>;
status = "disabled";
};
sdhci0: mmc@fa10000 {
compatible = "ti,am62-sdhci";
reg = <0x00 0xfa10000 0x00 0x1000>,
<0x00 0xfa18000 0x00 0x400>;
interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&scmi_pds 28>;
clocks = <&scmi_clk 122>, <&scmi_clk 125>;
clock-names = "clk_ahb", "clk_xin";
assigned-clocks = <&scmi_clk 125>;
bus-width = <8>;
ti,clkbuf-sel = <0x7>;
ti,otap-del-sel-legacy = <0x0>;
ti,otap-del-sel-mmc-hs = <0x0>;
ti,otap-del-sel-hs200 = <0x6>;
status = "disabled";
};
sdhci2: mmc@fa20000 {
compatible = "ti,am62-sdhci";
reg = <0x00 0x0fa20000 0x00 0x1000>,
<0x00 0x0fa28000 0x00 0x400>;
interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&scmi_pds 27>;
clocks = <&scmi_clk 114>, <&scmi_clk 117>;
clock-names = "clk_ahb", "clk_xin";
assigned-clocks = <&scmi_clk 117>;
bus-width = <4>;
ti,clkbuf-sel = <0x7>;
ti,otap-del-sel-legacy = <0x0>;
ti,itap-del-sel-legacy = <0x0>;
status = "disabled";
};
i2c0: i2c@20000000 {
compatible = "ti,am64-i2c", "ti,omap4-i2c";
reg = <0x00 0x20000000 0x00 0x100>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&scmi_pds 53>;
clocks = <&scmi_clk 246>;
clock-names = "fck";
status = "disabled";
};
i2c1: i2c@20010000 {
compatible = "ti,am64-i2c", "ti,omap4-i2c";
reg = <0x00 0x20010000 0x00 0x100>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&scmi_pds 54>;
clocks = <&scmi_clk 250>;
clock-names = "fck";
status = "disabled";
};
i2c2: i2c@20020000 {
compatible = "ti,am64-i2c", "ti,omap4-i2c";
reg = <0x00 0x20020000 0x00 0x100>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&scmi_pds 55>;
clocks = <&scmi_clk 254>;
clock-names = "fck";
status = "disabled";
};
i2c3: i2c@20030000 {
compatible = "ti,am64-i2c", "ti,omap4-i2c";
reg = <0x00 0x20030000 0x00 0x100>;
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&scmi_pds 56>;
clocks = <&scmi_clk 258>;
clock-names = "fck";
status = "disabled";
};
mcan0: can@20701000 {
compatible = "bosch,m_can";
reg = <0x00 0x20701000 0x00 0x200>,
<0x00 0x20708000 0x00 0x8000>;
reg-names = "m_can", "message_ram";
power-domains = <&scmi_pds 47>;
clocks = <&scmi_clk 179>, <&scmi_clk 178>;
clock-names = "hclk", "cclk";
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "int0", "int1";
bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
status = "disabled";
};
mcan1: can@20711000 {
compatible = "bosch,m_can";
reg = <0x00 0x20711000 0x00 0x200>,
<0x00 0x20718000 0x00 0x8000>;
reg-names = "m_can", "message_ram";
power-domains = <&scmi_pds 48>;
clocks = <&scmi_clk 185>, <&scmi_clk 184>;
clock-names = "hclk", "cclk";
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "int0", "int1";
bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
status = "disabled";
};
mcan2: can@20721000 {
compatible = "bosch,m_can";
reg = <0x00 0x20721000 0x00 0x200>,
<0x00 0x20728000 0x00 0x8000>;
reg-names = "m_can", "message_ram";
power-domains = <&scmi_pds 49>;
clocks = <&scmi_clk 191>, <&scmi_clk 190>;
clock-names = "hclk", "cclk";
interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "int0", "int1";
bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
status = "disabled";
};
spi0: spi@20100000 {
compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
reg = <0x00 0x20100000 0x00 0x400>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&scmi_pds 72>;
clocks = <&scmi_clk 299>;
status = "disabled";
};
spi1: spi@20110000 {
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
reg = <0x00 0x20110000 0x00 0x400>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&scmi_pds 73>;
clocks = <&scmi_clk 302>;
status = "disabled";
};
spi2: spi@20120000 {
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
reg = <0x00 0x20120000 0x00 0x400>;
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&scmi_pds 74>;
clocks = <&scmi_clk 305>;
status = "disabled";
};
spi3: spi@20130000 {
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
reg = <0x00 0x20130000 0x00 0x400>;
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&scmi_pds 75>;
clocks = <&scmi_clk 308>;
status = "disabled";
};
epwm0: pwm@23000000 {
compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
reg = <0x00 0x23000000 0x00 0x100>;
power-domains = <&scmi_pds 40>;
clocks = <&epwm_tbclk 0>, <&scmi_clk 164>;
clock-names = "tbclk", "fck";
#pwm-cells = <3>;
status = "disabled";
};
epwm1: pwm@23010000 {
compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
reg = <0x00 0x23010000 0x00 0x100>;
power-domains = <&scmi_pds 41>;
clocks = <&epwm_tbclk 1>, <&scmi_clk 165>;
clock-names = "tbclk", "fck";
#pwm-cells = <3>;
status = "disabled";
};
epwm2: pwm@23020000 {
compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
reg = <0x00 0x23020000 0x00 0x100>;
power-domains = <&scmi_pds 42>;
clocks = <&epwm_tbclk 2>, <&scmi_clk 166>;
clock-names = "tbclk", "fck";
#pwm-cells = <3>;
status = "disabled";
};
ecap0: pwm@23100000 {
compatible = "ti,am3352-ecap";
reg = <0x00 0x23100000 0x00 0x100>;
power-domains = <&scmi_pds 23>;
clocks = <&scmi_clk 99>;
clock-names = "fck";
#pwm-cells = <3>;
status = "disabled";
};
ecap1: pwm@23110000 {
compatible = "ti,am3352-ecap";
reg = <0x00 0x23110000 0x00 0x100>;
power-domains = <&scmi_pds 24>;
clocks = <&scmi_clk 100>;
clock-names = "fck";
#pwm-cells = <3>;
status = "disabled";
};
ecap2: pwm@23120000 {
compatible = "ti,am3352-ecap";
reg = <0x00 0x23120000 0x00 0x100>;
power-domains = <&scmi_pds 25>;
clocks = <&scmi_clk 101>;
clock-names = "fck";
#pwm-cells = <3>;
status = "disabled";
};
eqep0: counter@23200000 {
compatible = "ti,am62-eqep";
reg = <0x00 0x23200000 0x00 0x100>;
power-domains = <&scmi_pds 29>;
clocks = <&scmi_clk 127>;
interrupts = <GIC_SPI 162 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
};
eqep1: counter@23210000 {
compatible = "ti,am62-eqep";
reg = <0x00 0x23210000 0x00 0x100>;
power-domains = <&scmi_pds 30>;
clocks = <&scmi_clk 128>;
interrupts = <GIC_SPI 163 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
};
eqep2: counter@23220000 {
compatible = "ti,am62-eqep";
reg = <0x00 0x23220000 0x00 0x100>;
power-domains = <&scmi_pds 31>;
clocks = <&scmi_clk 129>;
interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
};
elm0: ecc@25010000 {
compatible = "ti,am64-elm";
reg = <0x00 0x25010000 0x00 0x2000>;
interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&scmi_pds 25>;
clocks = <&scmi_clk 102>;
clock-names = "fck";
status = "disabled";
};
gpmc0: memory-controller@3b000000 {
compatible = "ti,am64-gpmc";
power-domains = <&scmi_pds 37>;
clocks = <&scmi_clk 149>;
clock-names = "fck";
reg = <0x00 0x3b000000 0x00 0x400>,
<0x00 0x50000000 0x00 0x8000000>;
reg-names = "cfg", "data";
interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;
gpmc,num-cs = <3>;
gpmc,num-waitpins = <2>;
#address-cells = <2>;
#size-cells = <1>;
interrupt-controller;
#interrupt-cells = <2>;
gpio-controller;
#gpio-cells = <2>;
status = "disabled";
};
oc_sram: sram@70800000 {
compatible = "mmio-sram";
reg = <0x00 0x70800000 0x00 0x10000>;
ranges = <0x00 0x00 0x70800000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
scmi_shmem: sram@0 {
compatible = "arm,scmi-shmem";
reg = <0x00 0x100>;
bootph-all;
};
};
};

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// SPDX-License-Identifier: GPL-2.0-only or MIT
/*
* Device Tree file for the AM62L wakeup domain peripherals
* Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
*
* Technical Reference Manual: https://www.ti.com/lit/pdf/sprujb4
*/
#include <dt-bindings/bus/ti-sysc.h>
&cbass_wakeup {
vtm0: temperature-sensor@b00000 {
compatible = "ti,j7200-vtm";
reg = <0x00 0xb00000 0x00 0x400>,
<0x00 0xb01000 0x00 0x400>;
power-domains = <&scmi_pds 46>;
#thermal-sensor-cells = <1>;
};
pmx0: pinctrl@4084000 {
compatible = "ti,am62l-padconf", "pinctrl-single";
reg = <0x00 0x4084000 0x00 0x24c>;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0xffffffff>;
#pinctrl-cells = <1>;
};
wkup_gpio0: gpio@4201000 {
compatible = "ti,am64-gpio", "ti,keystone-gpio";
reg = <0x00 0x04201000 0x00 0x100>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&gic500>;
interrupts = <GIC_SPI 276 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 704 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 705 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 706 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 707 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 708 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 709 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 710 IRQ_TYPE_EDGE_RISING>;
interrupt-controller;
#interrupt-cells = <2>;
power-domains = <&scmi_pds 36>;
clocks = <&scmi_clk 146>;
clock-names = "gpio";
ti,ngpio = <7>;
ti,davinci-gpio-unbanked = <0>;
status = "disabled";
};
wkup_timer0: timer@2b100000 {
compatible = "ti,am654-timer";
reg = <0x00 0x2b100000 0x00 0x400>;
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scmi_clk 93>;
clock-names = "fck";
power-domains = <&scmi_pds 19>;
ti,timer-pwm;
};
wkup_timer1: timer@2b110000 {
compatible = "ti,am654-timer";
reg = <0x00 0x2b110000 0x00 0x400>;
interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scmi_clk 98>;
clock-names = "fck";
power-domains = <&scmi_pds 20>;
ti,timer-pwm;
};
wkup_i2c0: i2c@2b200000 {
compatible = "ti,am64-i2c", "ti,omap4-i2c";
reg = <0x00 0x2b200000 0x00 0x100>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&scmi_pds 57>;
clocks = <&scmi_clk 262>;
clock-names = "fck";
status = "disabled";
};
target-module@2b300050 {
compatible = "ti,sysc-omap2", "ti,sysc";
reg = <0x00 0x2b300050 0x00 0x4>,
<0x00 0x2b300054 0x00 0x4>,
<0x00 0x2b300058 0x00 0x4>;
reg-names = "rev", "sysc", "syss";
ranges = <0x00 0x00 0x2b300000 0x100000>;
#address-cells = <1>;
#size-cells = <1>;
power-domains = <&scmi_pds 83>;
clocks = <&scmi_clk 324>;
clock-names = "fck";
ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
SYSC_OMAP2_SOFTRESET |
SYSC_OMAP2_AUTOIDLE)>;
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>,
<SYSC_IDLE_SMART_WKUP>;
ti,syss-mask = <1>;
ti,no-reset-on-init;
status = "disabled";
wkup_uart0: serial@0 {
compatible = "ti,am64-uart", "ti,am654-uart";
reg = <0x00 0x100>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scmi_clk 324>;
assigned-clocks = <&scmi_clk 324>;
clock-names = "fclk";
status = "disabled";
};
};
wkup_conf: bus@43000000 {
compatible = "simple-bus";
ranges = <0x00 0x00 0x43000000 0x80000>;
#address-cells = <1>;
#size-cells = <1>;
chipid: chipid@14 {
compatible = "ti,am654-chipid";
reg = <0x14 0x4>;
bootph-all;
};
cpsw_mac_syscon: ethernet-mac-syscon@2000 {
compatible = "ti,am62p-cpsw-mac-efuse", "syscon";
reg = <0x2000 0x8>;
};
usb_phy_ctrl: syscon@45000 {
compatible = "ti,am62-usb-phy-ctrl", "syscon";
reg = <0x45000 0x1000>;
bootph-all;
};
};
};

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// SPDX-License-Identifier: GPL-2.0-only or MIT
/*
* Device Tree Source for AM62L SoC Family
* Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
*
* Technical Reference Manual: https://www.ti.com/lit/pdf/sprujb4
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "k3-pinctrl.h"
/ {
model = "Texas Instruments K3 AM62L3 SoC";
compatible = "ti,am62l3";
interrupt-parent = <&gic500>;
#address-cells = <2>;
#size-cells = <2>;
firmware {
optee {
compatible = "linaro,optee-tz";
method = "smc";
};
psci: psci {
compatible = "arm,psci-1.0";
method = "smc";
};
scmi: scmi {
compatible = "arm,scmi-smc";
arm,smc-id = <0x82004000>;
shmem = <&scmi_shmem>;
#address-cells = <1>;
#size-cells = <0>;
scmi_clk: protocol@14 {
reg = <0x14>;
#clock-cells = <1>;
bootph-all;
};
scmi_pds: protocol@11 {
reg = <0x11>;
#power-domain-cells = <1>;
bootph-all;
};
};
};
a53_timer0: timer-cl0-cpu0 {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, /* cntpsirq */
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, /* cntpnsirq */
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, /* cntvirq */
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; /* cnthpirq */
};
pmu: pmu {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
};
cbass_main: bus@f0000 {
compatible = "simple-bus";
ranges = <0x00 0x00600000 0x00 0x00600000 0x00 0x00010100>, /* GPIO */
<0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First Peripheral Window */
<0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000400>, /* Timesync Router */
<0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* CPSW */
<0x00 0x09000000 0x00 0x09000000 0x00 0x00400000>, /* CTRL MMRs */
<0x00 0x0e000000 0x00 0x0e000000 0x00 0x1a001400>, /* Second Peripheral Window */
<0x00 0x301c0000 0x00 0x301c0000 0x00 0x00001000>, /* DPHY-TX */
<0x00 0x30200000 0x00 0x30200000 0x00 0x0000b000>, /* DSS */
<0x00 0x30270000 0x00 0x30270000 0x00 0x00390000>, /* DSI Wrapper */
<0x00 0x30500000 0x00 0x30500000 0x00 0x00100000>, /* DSI Config */
<0x00 0x31000000 0x00 0x31000000 0x00 0x00050000>, /* USB0 DWC3 Core Window */
<0x00 0x31100000 0x00 0x31100000 0x00 0x00050000>, /* USB1 DWC3 Core Window */
<0x00 0x3b000000 0x00 0x3b000000 0x00 0x00000400>, /* GPMC0 */
<0x00 0x45810000 0x00 0x45810000 0x00 0x03170000>, /* DMSS */
<0x00 0x50000000 0x00 0x50000000 0x00 0x08000000>, /* GPMC DATA */
<0x00 0x60000000 0x00 0x60000000 0x00 0x08000000>, /* FSS DAT1 */
<0x00 0x70800000 0x00 0x70800000 0x00 0x00018000>, /* OCSRAM */
<0x01 0x00000000 0x01 0x00000000 0x00 0x00310000>, /* A53 PERIPHBASE */
<0x04 0x00000000 0x04 0x00000000 0x01 0x00000000>, /* FSS DAT0 */
<0x05 0x00000000 0x05 0x00000000 0x01 0x00000000>, /* FSS DAT3 */
/* Wakeup Domain Range */
<0x00 0x00a80000 0x00 0x00a80000 0x00 0x00034000>, /* GTC */
<0x00 0x00b00000 0x00 0x00b00000 0x00 0x00001400>, /* VTM */
<0x00 0x04080000 0x00 0x04080000 0x00 0x00008000>, /* PDCFG */
<0x00 0x04201000 0x00 0x04201000 0x00 0x00000100>, /* GPIO */
<0x00 0x2b100000 0x00 0x2b100000 0x00 0x00100100>, /* Wakeup Peripheral Window */
<0x00 0x40800000 0x00 0x40800000 0x00 0x00014000>, /* DMA */
<0x00 0x43000000 0x00 0x43000000 0x00 0x00080000>; /* CTRL MMRs */
#address-cells = <2>;
#size-cells = <2>;
cbass_wakeup: bus@43000000 {
compatible = "simple-bus";
ranges = <0x00 0x00a80000 0x00 0x00a80000 0x00 0x00034000>, /* GTC */
<0x00 0x00b00000 0x00 0x00b00000 0x00 0x00001400>, /* VTM */
<0x00 0x04080000 0x00 0x04080000 0x00 0x00008000>, /* PDCFG */
<0x00 0x04201000 0x00 0x04201000 0x00 0x00000100>, /* GPIO */
<0x00 0x2b100000 0x00 0x2b100000 0x00 0x00100100>, /* Wakeup Peripheral Window */
<0x00 0x40800000 0x00 0x40800000 0x00 0x00014000>, /* DMA */
<0x00 0x43000000 0x00 0x43000000 0x00 0x00080000>; /* CTRL MMRs */
#address-cells = <2>;
#size-cells = <2>;
};
};
};
/* Now include peripherals for each bus segment */
#include "k3-am62l-main.dtsi"
#include "k3-am62l-wakeup.dtsi"

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// SPDX-License-Identifier: GPL-2.0-only or MIT
/*
* Device Tree file for the AM62L3 Evaluation Module
* Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
*
* Technical Reference Manual: https://www.ti.com/lit/pdf/sprujb4
* Data Sheet: https://www.ti.com/lit/pdf/sprspa1
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/net/ti-dp83867.h>
#include <dt-bindings/thermal/thermal.h>
#include "k3-am62l3.dtsi"
#include "k3-pinctrl.h"
/ {
compatible = "ti,am62l3-evm", "ti,am62l3";
model = "Texas Instruments AM62L3 Evaluation Module";
chosen {
stdout-path = &uart0;
};
memory@80000000 {
reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
device_type = "memory";
bootph-all;
};
gpio_keys: gpio-keys {
compatible = "gpio-keys";
autorepeat;
pinctrl-names = "default";
pinctrl-0 = <&usr_button_pins_default>;
usr: button-usr {
label = "User Key";
linux,code = <BTN_0>;
gpios = <&gpio0 90 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&usr_led_pins_default>;
led-0 {
label = "am62-sk:green:heartbeat";
gpios = <&gpio0 123 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
function = LED_FUNCTION_HEARTBEAT;
default-state = "on";
};
};
thermal-zones {
wkup0-thermal {
polling-delay-passive = <250>; /* milliSeconds */
polling-delay = <500>; /* milliSeconds */
thermal-sensors = <&vtm0 0>;
trips {
crit0 {
temperature = <125000>;
hysteresis = <2000>;
type = "critical";
};
};
};
};
vmain_pd: regulator-0 {
/* TPS65988 PD CONTROLLER OUTPUT */
compatible = "regulator-fixed";
regulator-name = "vmain_pd";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
bootph-all;
};
vcc_3v3_sys: regulator-1 {
/* output of LM61460-Q1 */
compatible = "regulator-fixed";
regulator-name = "vcc_3v3_sys";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vmain_pd>;
regulator-always-on;
regulator-boot-on;
};
vdd_mmc1: regulator-2 {
/* TPS22918DBVR */
compatible = "regulator-fixed";
regulator-name = "vdd_mmc1";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
enable-active-high;
vin-supply = <&vcc_3v3_sys>;
gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
bootph-all;
};
vcc_1v8: regulator-3 {
/* output of TPS6282518DMQ */
compatible = "regulator-fixed";
regulator-name = "vcc_1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc_3v3_sys>;
regulator-always-on;
regulator-boot-on;
};
};
&gpio0 {
bootph-all;
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_default>;
clock-frequency = <400000>;
status = "okay";
eeprom@51 {
/* AT24C512C-MAHM-T or M24512-DFMC6TG */
compatible = "atmel,24c512";
reg = <0x51>;
};
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins_default>;
clock-frequency = <100000>;
status = "okay";
exp1: gpio@22 {
compatible = "ti,tca6424";
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names = "", "",
"UART1_FET_SEL", "MMC1_SD_EN",
"VPP_LDO_EN", "EXP_PS_3V3_EN",
"UART1_FET_BUF_EN", "", "",
"", "DSI_GPIO0", "DSI_GPIO1",
"", "BT_UART_WAKE_SOC_3V3",
"USB_TYPEA_OC_INDICATION", "",
"", "WLAN_ALERTn", "", "",
"HDMI_INTn", "TEST_GPIO2",
"MCASP0_FET_EN", "MCASP0_BUF_BT_EN",
"MCASP0_FET_SEL", "DSI_EDID",
"PD_I2C_IRQ", "IO_EXP_TEST_LED";
interrupt-parent = <&gpio0>;
interrupts = <91 IRQ_TYPE_EDGE_FALLING>;
interrupt-controller;
#interrupt-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&gpio0_ioexp_intr_pins_default>;
bootph-all;
};
exp2: gpio@23 {
compatible = "ti,tca6424";
reg = <0x23>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names = "BT_EN_SOC", "VOUT0_FET_SEL0",
"", "",
"", "",
"", "",
"WL_LT_EN", "EXP_PS_5V0_EN",
"TP45", "TP48",
"TP46", "TP49",
"TP47", "TP50",
"GPIO_QSPI_NAND_RSTn", "GPIO_HDMI_RSTn",
"GPIO_CPSW1_RST", "GPIO_CPSW2_RST",
"", "GPIO_AUD_RSTn",
"GPIO_eMMC_RSTn", "SoC_WLAN_SDIO_RST";
bootph-all;
};
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins_default>;
clock-frequency = <400000>;
status = "okay";
typec_pd0: tps658x@3f {
compatible = "ti,tps6598x";
reg = <0x3f>;
connector {
compatible = "usb-c-connector";
label = "USB-C";
self-powered;
data-role = "dual";
power-role = "sink";
port {
usb_con_hs: endpoint {
remote-endpoint = <&usb0_hs_ep>;
};
};
};
};
};
&pmx0 {
gpio0_ioexp_intr_pins_default: gpio0-ioexp-intr-default-pins {
pinctrl-single,pins = <
AM62LX_IOPAD(0x01b0, PIN_INPUT, 7) /* (B12) SPI0_D1.GPIO0_91 */
>;
bootph-all;
};
i2c0_pins_default: i2c0-default-pins {
pinctrl-single,pins = <
AM62LX_IOPAD(0x01cc, PIN_INPUT_PULLUP, 0) /* (B7) I2C0_SCL */
AM62LX_IOPAD(0x01d0, PIN_INPUT_PULLUP, 0) /* (A7) I2C0_SDA */
>;
bootph-all;
};
i2c1_pins_default: i2c1-default-pins {
pinctrl-single,pins = <
AM62LX_IOPAD(0x01d4, PIN_INPUT_PULLUP, 0) /* (D7) I2C1_SCL */
AM62LX_IOPAD(0x01d8, PIN_INPUT_PULLUP, 0) /* (A6) I2C1_SDA */
>;
bootph-all;
};
i2c2_pins_default: i2c2-default-pins {
pinctrl-single,pins = <
AM62LX_IOPAD(0x01dc, PIN_INPUT_PULLUP, 0) /* (B8) I2C2_SCL */
AM62LX_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (D8) I2C2_SDA */
>;
};
mmc0_pins_default: mmc0-default-pins {
pinctrl-single,pins = <
AM62LX_IOPAD(0x0214, PIN_INPUT_PULLUP, 0) /* (D2) MMC0_CMD */
AM62LX_IOPAD(0x020c, PIN_OUTPUT, 0) /* (B2) MMC0_CLK */
AM62LX_IOPAD(0x0208, PIN_INPUT_PULLUP, 0) /* (D3) MMC0_DAT0 */
AM62LX_IOPAD(0x0204, PIN_INPUT_PULLUP, 0) /* (D4) MMC0_DAT1 */
AM62LX_IOPAD(0x0200, PIN_INPUT_PULLUP, 0) /* (C1) MMC0_DAT2 */
AM62LX_IOPAD(0x01fc, PIN_INPUT_PULLUP, 0) /* (C2) MMC0_DAT3 */
AM62LX_IOPAD(0x01f8, PIN_INPUT_PULLUP, 0) /* (C4) MMC0_DAT4 */
AM62LX_IOPAD(0x01f4, PIN_INPUT_PULLUP, 0) /* (B3) MMC0_DAT5 */
AM62LX_IOPAD(0x01f0, PIN_INPUT_PULLUP, 0) /* (A3) MMC0_DAT6 */
AM62LX_IOPAD(0x01ec, PIN_INPUT_PULLUP, 0) /* (B4) MMC0_DAT7 */
>;
bootph-all;
};
mmc1_pins_default: mmc1-default-pins {
pinctrl-single,pins = <
AM62LX_IOPAD(0x0230, PIN_INPUT, 0) /* (Y3) MMC1_CMD */
AM62LX_IOPAD(0x0228, PIN_OUTPUT, 0) /* (Y2) MMC1_CLK */
AM62LX_IOPAD(0x0224, PIN_INPUT, 0) /* (AA1) MMC1_DAT0 */
AM62LX_IOPAD(0x0220, PIN_INPUT_PULLUP, 0) /* (Y4) MMC1_DAT1 */
AM62LX_IOPAD(0x021c, PIN_INPUT_PULLUP, 0) /* (AA2) MMC1_DAT2 */
AM62LX_IOPAD(0x0218, PIN_INPUT_PULLUP, 0) /* (AB2) MMC1_DAT3 */
AM62LX_IOPAD(0x0234, PIN_INPUT, 0) /* (B6) MMC1_SDCD */
>;
bootph-all;
};
uart0_pins_default: uart0-default-pins {
pinctrl-single,pins = <
AM62LX_IOPAD(0x01b4, PIN_INPUT, 0) /* (D13) UART0_RXD */
AM62LX_IOPAD(0x01b8, PIN_OUTPUT, 0) /* (C13) UART0_TXD */
>;
bootph-all;
};
usb1_default_pins: usb1-default-pins {
pinctrl-single,pins = <
AM62LX_IOPAD(0x0248, PIN_INPUT | PIN_DS_PULLUD_ENABLE | PIN_DS_PULL_UP, 0) /* (A5) USB1_DRVVBUS */
>;
};
usr_button_pins_default: usr-button-default-pins {
pinctrl-single,pins = <
AM62LX_IOPAD(0x01ac, PIN_INPUT, 7) /* (E12) SPI0_D0.GPIO0_90 */
>;
};
usr_led_pins_default: usr-led-default-pins {
pinctrl-single,pins = <
AM62LX_IOPAD(0x0238, PIN_OUTPUT, 7) /* (D24) MMC1_SDWP.GPIO0_123 */
>;
};
};
&sdhci0 {
/* eMMC */
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins_default>;
non-removable;
status = "okay";
bootph-all;
};
&sdhci1 {
/* SD/MMC */
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins_default>;
vmmc-supply = <&vdd_mmc1>;
disable-wp;
status = "okay";
bootph-all;
};
&uart0 {
pinctrl-0 = <&uart0_pins_default>;
pinctrl-names = "default";
status = "okay";
bootph-all;
};
&usbss0 {
status = "okay";
ti,vbus-divider;
};
&usb0 {
usb-role-switch;
port {
usb0_hs_ep: endpoint {
remote-endpoint = <&usb_con_hs>;
};
};
};
&usbss1 {
status = "okay";
ti,vbus-divider;
};
&usb1 {
dr_mode = "host";
pinctrl-names = "default";
pinctrl-0 = <&usb1_default_pins>;
};

67
arch/arm64/boot/dts/ti/k3-am62l3.dtsi Normal file
View File

@ -0,0 +1,67 @@
// SPDX-License-Identifier: GPL-2.0-only or MIT
/*
* Device Tree file for the AM62L3 SoC family (Dual Core A53)
* Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
*
* Technical Reference Manual: https://www.ti.com/lit/pdf/sprujb4
*/
/dts-v1/;
#include "k3-am62l.dtsi"
/ {
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu-map {
cluster0: cluster0 {
core0 {
cpu = <&cpu0>;
};
core1 {
cpu = <&cpu1>;
};
};
};
cpu0: cpu@0 {
compatible = "arm,cortex-a53";
reg = <0x000>;
device_type = "cpu";
enable-method = "psci";
i-cache-size = <0x8000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&l2_0>;
};
cpu1: cpu@1 {
compatible = "arm,cortex-a53";
reg = <0x001>;
device_type = "cpu";
enable-method = "psci";
i-cache-size = <0x8000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&l2_0>;
};
};
l2_0: l2-cache0 {
compatible = "cache";
cache-unified;
cache-level = <2>;
cache-size = <0x40000>;
cache-line-size = <64>;
cache-sets = <256>;
};
};

18
arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
View File

@ -46,6 +46,24 @@
#size-cells = <1>;
ranges = <0x00 0x00 0x00100000 0x20000>;
audio_refclk0: clock-controller@82e0 {
compatible = "ti,am62-audio-refclk";
reg = <0x82e0 0x4>;
clocks = <&k3_clks 157 0>;
assigned-clocks = <&k3_clks 157 0>;
assigned-clock-parents = <&k3_clks 157 16>;
#clock-cells = <0>;
};
audio_refclk1: clock-controller@82e4 {
compatible = "ti,am62-audio-refclk";
reg = <0x82e4 0x4>;
clocks = <&k3_clks 157 18>;
assigned-clocks = <&k3_clks 157 18>;
assigned-clock-parents = <&k3_clks 157 34>;
#clock-cells = <0>;
};
phy_gmii_sel: phy@4044 {
compatible = "ti,am654-phy-gmii-sel";
reg = <0x4044 0x8>;

20
arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
View File

@ -42,26 +42,6 @@
ti,interrupt-ranges = <5 69 35>;
};
&main_conf {
audio_refclk0: clock-controller@82e0 {
compatible = "ti,am62-audio-refclk";
reg = <0x82e0 0x4>;
clocks = <&k3_clks 157 0>;
assigned-clocks = <&k3_clks 157 0>;
assigned-clock-parents = <&k3_clks 157 16>;
#clock-cells = <0>;
};
audio_refclk1: clock-controller@82e4 {
compatible = "ti,am62-audio-refclk";
reg = <0x82e4 0x4>;
clocks = <&k3_clks 157 18>;
assigned-clocks = <&k3_clks 157 18>;
assigned-clock-parents = <&k3_clks 157 34>;
#clock-cells = <0>;
};
};
&main_gpio0 {
gpio-ranges = <&main_pmx0 0 0 32>, <&main_pmx0 32 33 38>,
<&main_pmx0 70 72 22>;

2
arch/arm64/boot/dts/ti/k3-am62p-verdin-dev.dtsi
View File

@ -78,7 +78,7 @@
/* Verdin ETH_2_RGMII */
&cpsw_port2 {
phy-handle = <&carrier_eth_phy>;
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
status = "okay";
};

2
arch/arm64/boot/dts/ti/k3-am62p-verdin-ivy.dtsi
View File

@ -275,7 +275,7 @@
/* Verdin ETH_2_RGMII */
&cpsw_port2 {
phy-handle = <&carrier_eth_phy>;
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
status = "okay";
};

2
arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi
View File

@ -813,7 +813,7 @@
/* Verdin ETH_1 (On-module PHY) */
&cpsw_port1 {
phy-handle = <&som_eth_phy>;
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
status = "disabled";
};

29
arch/arm64/boot/dts/ti/k3-am62p.dtsi
View File

@ -44,6 +44,33 @@
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
};
system-idle-states {
system_partial_io: system-partial-io {
compatible = "system-idle-state";
idle-state-name = "off-wake";
};
system_io_ddr: system-io-ddr {
compatible = "system-idle-state";
idle-state-name = "mem-deep";
};
system_deep_sleep: system-deep-sleep {
compatible = "system-idle-state";
idle-state-name = "mem";
};
system_mcu_only: system-mcu-only {
compatible = "system-idle-state";
idle-state-name = "mem-mcu-active";
};
system_standby: system-standby {
compatible = "system-idle-state";
idle-state-name = "standby";
};
};
cbass_main: bus@f0000 {
compatible = "simple-bus";
#address-cells = <2>;
@ -59,7 +86,7 @@
<0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
<0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
<0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
<0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */
<0x00 0x0fd80000 0x00 0x0fd80000 0x00 0x00080000>, /* GPU */
<0x00 0x20000000 0x00 0x20000000 0x00 0x0a008000>, /* Third peripheral window */
<0x00 0x30040000 0x00 0x30040000 0x00 0x00080000>, /* PRUSS-M */
<0x00 0x30101000 0x00 0x30101000 0x00 0x00010100>, /* CSI window */

73
arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
View File

@ -541,14 +541,14 @@
};
&cpsw_port1 {
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
phy-handle = <&cpsw3g_phy0>;
status = "okay";
bootph-all;
};
&cpsw_port2 {
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
phy-handle = <&cpsw3g_phy1>;
status = "okay";
};
@ -716,12 +716,52 @@
>;
bootph-all;
};
mcu_mcan0_tx_pins_default: mcu-mcan0-tx-default-pins {
pinctrl-single,pins = <
AM62PX_MCU_IOPAD(0x034, PIN_OUTPUT, 0) /* (D6) MCU_MCAN0_TX */
>;
};
mcu_mcan0_rx_pins_default: mcu-mcan0-rx-default-pins {
pinctrl-single,pins = <
AM62PX_MCU_IOPAD(0x038, PIN_INPUT, 0) /* (B3) MCU_MCAN0_RX */
>;
};
mcu_mcan0_rx_pins_wakeup: mcu-mcan0-rx-wakeup-pins {
pinctrl-single,pins = <
AM62PX_MCU_IOPAD(0x038, PIN_INPUT | PIN_WKUP_EN, 0) /* (B3) MCU_MCAN0_RX */
>;
};
mcu_mcan1_tx_pins_default: mcu-mcan1-tx-default-pins {
pinctrl-single,pins = <
AM62PX_MCU_IOPAD(0x03c, PIN_OUTPUT, 0) /* (E5) MCU_MCAN1_TX */
>;
};
mcu_mcan1_rx_pins_default: mcu-mcan1-rx-default-pins {
pinctrl-single,pins = <
AM62PX_MCU_IOPAD(0x040, PIN_INPUT, 0) /* (D4) MCU_MCAN1_RX */
>;
};
mcu_mcan1_rx_pins_wakeup: mcu-mcan1-rx-wakeup-pins {
pinctrl-single,pins = <
AM62PX_MCU_IOPAD(0x040, PIN_INPUT | PIN_WKUP_EN, 0) /* (D4) MCU_MCAN1_RX */
>;
};
};
&wkup_uart0 {
/* WKUP UART0 is used by DM firmware */
pinctrl-names = "default";
pinctrl-0 = <&wkup_uart0_pins_default>;
wakeup-source = <&system_io_ddr>,
<&system_deep_sleep>,
<&system_mcu_only>,
<&system_standby>;
status = "reserved";
bootph-all;
};
@ -763,4 +803,33 @@
status = "okay";
};
&mcu_mcan0 {
pinctrl-names = "default", "wakeup";
pinctrl-0 = <&mcu_mcan0_tx_pins_default>, <&mcu_mcan0_rx_pins_default>;
pinctrl-1 = <&mcu_mcan0_tx_pins_default>, <&mcu_mcan0_rx_pins_wakeup>;
wakeup-source = <&system_partial_io>,
<&system_io_ddr>,
<&system_deep_sleep>,
<&system_mcu_only>,
<&system_standby>;
};
&mcu_mcan1 {
pinctrl-names = "default", "wakeup";
pinctrl-0 = <&mcu_mcan1_tx_pins_default>, <&mcu_mcan1_rx_pins_default>;
pinctrl-1 = <&mcu_mcan1_tx_pins_default>, <&mcu_mcan1_rx_pins_wakeup>;
wakeup-source = <&system_partial_io>,
<&system_io_ddr>,
<&system_deep_sleep>,
<&system_mcu_only>,
<&system_standby>;
};
&mcu_uart0 {
wakeup-source = <&system_io_ddr>,
<&system_deep_sleep>,
<&system_mcu_only>,
<&system_standby>;
};
#include "k3-am62p-ti-ipc-firmware.dtsi"

148
arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi
View File

@ -63,18 +63,6 @@
no-map;
};
mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@9b800000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9b800000 0x00 0x00100000>;
no-map;
};
mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@9b900000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9b900000 0x00 0x00f00000>;
no-map;
};
wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9c800000 0x00 0x00100000>;
@ -124,6 +112,38 @@
enable-active-high;
regulator-always-on;
};
sound {
compatible = "simple-audio-card";
simple-audio-card,bitclock-master = <&codec_dai>;
simple-audio-card,format = "dsp_b";
simple-audio-card,frame-master = <&codec_dai>;
simple-audio-card,name = "wm8904-audio";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,routing =
"Headphone Jack", "HPOUTL",
"Headphone Jack", "HPOUTR",
"IN2L", "Line In Jack",
"IN2R", "Line In Jack",
"IN1L", "Microphone Jack",
"IN1R", "Microphone Jack";
simple-audio-card,widgets =
"Microphone", "Microphone Jack",
"Headphone", "Headphone Jack",
"Line", "Line In Jack";
codec_dai: simple-audio-card,codec {
sound-dai = <&wm8904>;
};
simple-audio-card,cpu {
sound-dai = <&mcasp1>;
};
};
};
&audio_refclk1 {
assigned-clock-rates = <100000000>;
};
&cpsw3g {
@ -161,6 +181,19 @@
pinctrl-0 = <&pinctrl_i2c2>;
clock-frequency = <400000>;
status = "okay";
wm8904: audio-codec@1a {
compatible = "wlf,wm8904";
reg = <0x1a>;
#sound-dai-cells = <0>;
clocks = <&audio_refclk1>;
clock-names = "mclk";
AVDD-supply = <&reg_1v8>;
CPVDD-supply = <&reg_1v8>;
DBVDD-supply = <&reg_3v3>;
DCVDD-supply = <&reg_1v8>;
MICVDD-supply = <&reg_1v8>;
};
};
&main_i2c3 {
@ -191,6 +224,16 @@
>;
};
pinctrl_mcasp1: main-mcasp1-default-pins {
pinctrl-single,pins = <
AM62PX_IOPAD(0x0090, PIN_INPUT, 2) /* (U24) GPMC0_BE0n_CLE.MCASP1_ACLKX */
AM62PX_IOPAD(0x0098, PIN_INPUT, 2) /* (AA24) GPMC0_WAIT0.MCASP1_AFSX */
AM62PX_IOPAD(0x008c, PIN_OUTPUT, 2) /* (T25) GPMC0_WEn.MCASP1_AXR0 */
AM62PX_IOPAD(0x0084, PIN_INPUT, 2) /* (R25) GPMC0_ADVn_ALE.MCASP1_AXR2 */
AM62PX_IOPAD(0x00a0, PIN_OUTPUT, 1) /* (P24) GPMC0_WPn.AUDIO_EXT_REFCLK1 */
>;
};
pinctrl_mdio1: main-mdio1-default-pins {
pinctrl-single,pins = <
AM62PX_IOPAD(0x0160, PIN_OUTPUT, 0) /* (F17) MDIO0_MDC */
@ -279,6 +322,30 @@
pinctrl-0 = <&pinctrl_spi0>;
ti,pindir-d0-out-d1-in;
status = "okay";
/* Resistive touch controller */
ads7846: touchscreen@0 {
compatible = "ti,ads7846";
reg = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_restouch>;
interrupt-parent = <&main_gpio0>;
interrupts = <48 IRQ_TYPE_EDGE_FALLING>;
spi-max-frequency = <1500000>;
pendown-gpio = <&main_gpio0 48 GPIO_ACTIVE_LOW>;
ti,x-min = /bits/ 16 <125>;
ti,x-max = /bits/ 16 <4008>;
ti,y-min = /bits/ 16 <282>;
ti,y-max = /bits/ 16 <3864>;
ti,x-plate-ohms = /bits/ 16 <180>;
ti,pressure-max = /bits/ 16 <255>;
ti,debounce-max = /bits/ 16 <10>;
ti,debounce-tol = /bits/ 16 <3>;
ti,debounce-rep = /bits/ 16 <1>;
ti,settle-delay-usec = /bits/ 16 <150>;
ti,keep-vref-on;
wakeup-source;
};
};
&main_uart5 {
@ -292,6 +359,23 @@
};
};
&mcasp1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mcasp1>;
op-mode = <0>; /* MCASP_IIS_MODE */
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
1 0 2 0
0 0 0 0
0 0 0 0
0 0 0 0
>;
tdm-slots = <2>;
tx-num-evt = <0>;
rx-num-evt = <0>;
#sound-dai-cells = <0>;
status = "okay";
};
&sdhci0 {
/* On-module eMMC */
ti,driver-strength-ohm = <50>;
@ -320,44 +404,6 @@
ti,vbus-divider;
};
&mailbox0_cluster0 {
status = "okay";
mbox_r5_0: mbox-r5-0 {
ti,mbox-rx = <0 0 0>;
ti,mbox-tx = <1 0 0>;
};
};
&mailbox0_cluster1 {
status = "okay";
mbox_mcu_r5_0: mbox-mcu-r5-0 {
ti,mbox-rx = <0 0 0>;
ti,mbox-tx = <1 0 0>;
};
};
&mcu_r5fss0 {
status = "okay";
};
&mcu_r5fss0_core0 {
mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>;
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
<&mcu_r5fss0_core0_memory_region>;
};
&wkup_r5fss0 {
status = "okay";
};
&wkup_r5fss0_core0 {
mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
<&wkup_r5fss0_core0_memory_region>;
};
/* mcu_gpio0 and mcu_gpio_intr are reserved for mcu firmware usage */
&mcu_gpio0 {
status = "reserved";
@ -385,3 +431,5 @@
/* Main UART1 is used by TIFS firmware */
status = "reserved";
};
#include "k3-am62p-ti-ipc-firmware.dtsi"

2
arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra.dtsi
View File

@ -291,7 +291,7 @@
};
&cpsw_port2 {
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
phy-handle = <&cpsw3g_phy3>;
};

2
arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi
View File

@ -438,7 +438,7 @@
&cpsw_port1 {
bootph-all;
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
phy-handle = <&cpsw3g_phy0>;
};

2
arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
View File

@ -178,7 +178,7 @@
};
&cpsw_port1 {
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
phy-handle = <&cpsw3g_phy1>;
bootph-all;
status = "okay";

7
arch/arm64/boot/dts/ti/k3-am642-evm.dts
View File

@ -579,13 +579,13 @@
&cpsw_port1 {
bootph-all;
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
phy-handle = <&cpsw3g_phy0>;
status = "okay";
};
&cpsw_port2 {
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
phy-handle = <&cpsw3g_phy3>;
status = "okay";
};
@ -608,6 +608,9 @@
/* ADC is reserved for R5 usage */
status = "reserved";
dmas = <&main_bcdma 0 0x440f 0>, <&main_bcdma 0 0x4410 0>;
dma-names = "fifo0", "fifo1";
adc {
ti,adc-channels = <0 1 2 3 4 5 6 7>;
};

4
arch/arm64/boot/dts/ti/k3-am642-sk.dts
View File

@ -499,13 +499,13 @@
};
&cpsw_port1 {
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
phy-handle = <&cpsw3g_phy0>;
status = "okay";
};
&cpsw_port2 {
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
phy-handle = <&cpsw3g_phy1>;
status = "okay";
};

20
arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts
View File

@ -175,6 +175,7 @@
regulator-max-microvolt = <3300000>;
gpio = <&main_gpio1 43 GPIO_ACTIVE_HIGH>;
enable-active-high;
bootph-all;
};
};
@ -185,7 +186,7 @@
};
&cpsw_port1 {
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
phy-handle = <&cpsw3g_phy0>;
status = "okay";
};
@ -260,6 +261,7 @@
"", "", "STATUS_OUT_3", "EN_DIG_OUT_4", /* 32-35 */
"", "", "STATUS_OUT_4", "DIG_IN_1", /* 36-39 */
"DIG_IN_2", "DIG_IN_3", "DIG_IN_4"; /* 40- */
bootph-all;
};
&main_gpio1 {
@ -285,6 +287,7 @@
"", "", "", "", /* 60-63 */
"", "", "", "ADC_INT#", /* 64-67 */
"BG95_PWRKEY", "BG95_RESET"; /* 68- */
bootph-all;
line50-hog {
/* See also usb0 */
@ -334,6 +337,7 @@
&main_uart0 {
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins>;
bootph-pre-ram;
status = "okay";
};
@ -493,6 +497,11 @@
&serdes_ln_ctrl {
idle-states = <AM64_SERDES0_LANE0_USB>;
bootph-all;
};
&serdes_refclk {
bootph-all;
};
&serdes0 {
@ -500,6 +509,7 @@
reg = <0>;
#phy-cells = <0>;
resets = <&serdes_wiz0 1>;
bootph-all;
cdns,num-lanes = <1>;
cdns,phy-type = <PHY_TYPE_USB3>;
};
@ -512,6 +522,7 @@
cd-gpios = <&main_gpio1 77 GPIO_ACTIVE_LOW>;
disable-wp;
no-mmc;
bootph-all;
ti,fails-without-test-cd;
/* Enabled by overlay */
};
@ -535,9 +546,11 @@
maximum-speed = "super-speed";
phys = <&serdes0_usb_link>;
phy-names = "cdns3,usb3-phy";
bootph-all;
};
&usbss0 {
bootph-all;
ti,vbus-divider;
};
@ -625,6 +638,7 @@
/* (P19) GPMC0_CSn2.GPIO0_43 - MMC1_CTRL */
AM64X_IOPAD(0x00b0, PIN_OUTPUT, 7)
>;
bootph-all;
};
main_gpio1_hog_pins: main-gpio1-hog-pins {
@ -748,6 +762,7 @@
/* (#N/A) MMC1_CLKLB */
AM64X_IOPAD(0x0290, PIN_INPUT, 0)
>;
bootph-all;
};
main_mmc1_reg_pins: main-mmc1-reg-pins {
@ -755,6 +770,7 @@
/* (C13) SPI0_CS1.GPIO1_43 - MMC1_SD_EN */
AM64X_IOPAD(0x020c, PIN_OUTPUT, 7)
>;
bootph-all;
};
main_mmc1_wifi_pwrseq_pins: main-mmc1-wifi-pwrseq-pins {
@ -797,6 +813,7 @@
/* (C16) UART0_TXD */
AM64X_IOPAD(0x0234, PIN_OUTPUT, 0)
>;
bootph-pre-ram;
};
main_uart1_pins: main-uart1-pins {
@ -865,6 +882,7 @@
/* (E19) USB0_DRVVBUS */
AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0)
>;
bootph-all;
};
pru_icssg1_mdio_pins: pru-icssg1-mdio-pins {

15
arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi
View File

@ -17,7 +17,7 @@
device_type = "memory";
/* 1G RAM - default variant */
reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
bootph-pre-ram;
};
reserved_memory: reserved-memory {
@ -54,10 +54,15 @@
};
};
&fss {
bootph-all;
};
&main_i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_pins>;
clock-frequency = <400000>;
bootph-pre-ram;
status = "okay";
tmp1075: temperature-sensor@4a {
@ -72,6 +77,7 @@
vcc-supply = <&reg_1v8>;
pagesize = <16>;
read-only;
bootph-pre-ram;
};
pcf85063: rtc@51 {
@ -89,9 +95,10 @@
};
&ospi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ospi0_pins>;
bootph-all;
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
@ -99,6 +106,7 @@
spi-tx-bus-width = <8>;
spi-rx-bus-width = <8>;
spi-max-frequency = <84000000>;
bootph-all;
cdns,tshsl-ns = <60>;
cdns,tsd2d-ns = <60>;
cdns,tchsh-ns = <60>;
@ -121,6 +129,7 @@
disable-wp;
no-sdio;
no-sd;
bootph-all;
ti,driver-strength-ohm = <50>;
};
@ -132,6 +141,7 @@
/* (B18) I2C0_SDA */
AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0)
>;
bootph-pre-ram;
};
ospi0_pins: ospi0-pins {
@ -159,6 +169,7 @@
/* (N19) OSPI0_DQS */
AM64X_IOPAD(0x0008, PIN_INPUT, 0)
>;
bootph-all;
};
};

4
arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
View File

@ -457,10 +457,6 @@
#size-cells = <0>;
};
&mcu_cpsw {
status = "disabled";
};
&sdhci1 {
status = "okay";
pinctrl-names = "default";

2
arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
View File

@ -354,6 +354,8 @@
"tx4", "tx5", "tx6", "tx7",
"rx";
status = "disabled";
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;

3
arch/arm64/boot/dts/ti/k3-am654-base-board.dts
View File

@ -571,6 +571,7 @@
&mcu_cpsw {
pinctrl-names = "default";
pinctrl-0 = <&mcu_cpsw_pins_default>;
status = "okay";
};
&davinci_mdio {
@ -586,7 +587,7 @@
};
&cpsw_port1 {
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
phy-handle = <&phy0>;
};

2
arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts
View File

@ -249,7 +249,7 @@
};
&cpsw_port1 {
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
phy-handle = <&cpsw3g_phy0>;
status = "okay";
};

146
arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-ads2.dtso Normal file
View File

@ -0,0 +1,146 @@
// SPDX-License-Identifier: GPL-2.0-only OR MIT
/*
* Kontron SMARC-sa67 board on the Kontron Eval Carrier 2.2.
*
* Copyright (c) 2025 Kontron Europe GmbH
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/irq.h>
#include "k3-pinctrl.h"
&{/} {
pwm-fan {
compatible = "pwm-fan";
pinctrl-names = "default";
pinctrl-0 = <&pwm_fan_pins_default>;
interrupts-extended = <&main_gpio1 7 IRQ_TYPE_EDGE_FALLING>;
#cooling-cells = <2>;
pwms = <&epwm2 1 4000000 0>;
cooling-levels = <1 128 192 255>;
};
sound {
compatible = "simple-audio-card";
simple-audio-card,widgets =
"Headphone", "Headphone Jack",
"Line", "Line Out Jack",
"Microphone", "Microphone Jack",
"Line", "Line In Jack";
simple-audio-card,routing =
"Line Out Jack", "LINEOUTR",
"Line Out Jack", "LINEOUTL",
"Headphone Jack", "HPOUTR",
"Headphone Jack", "HPOUTL",
"IN1L", "Line In Jack",
"IN1R", "Line In Jack",
"Microphone Jack", "MICBIAS",
"IN2L", "Microphone Jack",
"IN2R", "Microphone Jack";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&dailink0_master>;
simple-audio-card,frame-master = <&dailink0_master>;
simple-audio-card,cpu {
sound-dai = <&mcasp0>;
};
dailink0_master: simple-audio-card,codec {
sound-dai = <&wm8904>;
clocks = <&audio_refclk0>;
};
};
cvcc_1p8v_i2s: regulator-carrier-0 {
compatible = "regulator-fixed";
regulator-name = "V_1V8_S0_I2S";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
cvcc_1p8v_s0: regulator-carrier-1 {
compatible = "regulator-fixed";
regulator-name = "V_1V8_S0";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
cvcc_3p3v_s0: regulator-carrier-2 {
compatible = "regulator-fixed";
regulator-name = "V_3V3_S0";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
&audio_refclk0 {
status = "okay";
};
&epwm2 {
status = "okay";
};
&main_pmx0 {
pwm_fan_pins_default: pwm-fan-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x1ec, PIN_OUTPUT, 8) /* (A22) I2C1_SDA.EHRPWM2_B */
J722S_IOPAD(0x194, PIN_INPUT, 0) /* (A25) MCASP0_AXR3.GPIO1_7 */
>;
};
};
&mcasp0 {
#sound-dai-cells = <0>;
status = "okay";
};
&mcu_i2c0 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
wm8904: audio-codec@1a {
#sound-dai-cells = <0>;
compatible = "wlf,wm8904";
reg = <0x1a>;
clocks = <&audio_refclk0>;
clock-names = "mclk";
AVDD-supply = <&cvcc_1p8v_i2s>;
CPVDD-supply = <&cvcc_1p8v_i2s>;
DBVDD-supply = <&cvcc_1p8v_i2s>;
DCVDD-supply = <&cvcc_1p8v_i2s>;
MICVDD-supply = <&cvcc_1p8v_i2s>;
};
};
&mcu_spi0 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <104000000>;
m25p,fast-read;
vcc-supply = <&cvcc_1p8v_s0>;
};
};
&wkup_i2c0 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
/* SMARC Carrier EEPROM */
eeprom@57 {
compatible = "atmel,24c32";
reg = <0x57>;
pagesize = <32>;
vcc-supply = <&cvcc_3p3v_s0>;
};
};

1091
arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-base.dts Normal file
View File

File diff suppressed because it is too large Load Diff

26
arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-gbe1.dtso Normal file
View File

@ -0,0 +1,26 @@
// SPDX-License-Identifier: GPL-2.0-only OR MIT
/*
* Second ethernet port GBE1.
*
* Copyright (c) 2025 Kontron Europe GmbH
*/
/dts-v1/;
/plugin/;
&cpsw3g_mdio {
#address-cells = <1>;
#size-cells = <0>;
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&cpsw_port2 {
phy-connection-type = "rgmii-id";
phy-handle = <&phy1>;
nvmem-cells = <&base_mac_address 1>;
nvmem-cell-names = "mac-address";
status = "okay";
};

61
arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-gpios.dtso Normal file
View File

@ -0,0 +1,61 @@
// SPDX-License-Identifier: GPL-2.0-only OR MIT
/*
* SMARC GPIOs.
*
* Copyright (c) 2025 Kontron Europe GmbH
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
#include "k3-pinctrl.h"
&main_gpio0 {
pinctrl-names = "default";
pinctrl-0 = <&main_gpio0_pins_default>;
};
&main_gpio1 {
pinctrl-names = "default";
pinctrl-0 = <&main_gpio1_pins_default>;
};
&main_pmx0 {
main_gpio0_pins_default: main-gpio0-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x0d0, PIN_INPUT, 7) /* (Y26) VOUT0_DATA6.GPIO0_51 */
J722S_IOPAD(0x0d4, PIN_INPUT, 7) /* (Y27) VOUT0_DATA7.GPIO0_52 */
J722S_IOPAD(0x118, PIN_INPUT, 7) /* (H26) MMC2_CLK.GPIO0_69 */
J722S_IOPAD(0x120, PIN_INPUT, 7) /* (F27) MMC2_CMD.GPIO0_70 */
>;
};
main_gpio1_pins_default: main-gpio1-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x194, PIN_INPUT, 7) /* (A25) MCASP0_AXR3.GPIO1_7 */
J722S_IOPAD(0x198, PIN_INPUT, 7) /* (A26) MCASP0_AXR2.GPIO1_8 */
J722S_IOPAD(0x1ac, PIN_INPUT, 7) /* (C27) MCASP0_AFSR.GPIO1_13 */
J722S_IOPAD(0x1b0, PIN_INPUT, 7) /* (F24) MCASP0_ACLKR.GPIO1_14 */
J722S_IOPAD(0x1d8, PIN_INPUT, 7) /* (D22) MCAN0_TX.GPIO1_24 */
J722S_IOPAD(0x1dc, PIN_INPUT, 7) /* (C22) MCAN0_RX.GPIO1_25 */
J722S_IOPAD(0x1e8, PIN_INPUT, 7) /* (C24) I2C1_SCL.GPIO1_28 */
J722S_IOPAD(0x1ec, PIN_INPUT, 7) /* (A22) I2C1_SDA.GPIO1_29 */
>;
};
};
&mcu_gpio0 {
pinctrl-names = "default";
pinctrl-0 = <&mcu_gpio0_pins_default>;
};
&mcu_pmx0 {
mcu_gpio0_pins_default: mcu-gpio0-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x02c, PIN_INPUT, 7) /* (C4) WKUP_UART0_CTSn.MCU_GPIO0_11 */
J722S_IOPAD(0x084, PIN_INPUT, 7) /* (F12) WKUP_CLKOUT0.MCU_GPIO0_23 */
>;
};
};

31
arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-rtc-rv8263.dtso Normal file
View File

@ -0,0 +1,31 @@
// SPDX-License-Identifier: GPL-2.0-only OR MIT
/*
* Microcrystal RV8263 RTC variant.
*
* Copyright (c) 2025 Kontron Europe GmbH
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/irq.h>
&{/} {
aliases {
rtc0 = "/bus@f0000/i2c@20000000/rtc@51"; /* &rtc */
rtc1 = "/bus@f0000/bus@b00000/rtc@2b1f0000"; /* &wkup_rtc0 */
};
};
&main_i2c0 {
#address-cells = <1>;
#size-cells = <0>;
rtc: rtc@51 {
compatible = "microcrystal,rv8263";
reg = <0x51>;
pinctrl-names = "default";
pinctrl-0 = <&rtc_pins_default>;
interrupts-extended = <&main_gpio0 36 IRQ_TYPE_EDGE_FALLING>;
};
};

3
arch/arm64/boot/dts/ti/k3-am68-phyboard-izar.dts
View File

@ -281,7 +281,7 @@
};
&cpsw_port1 {
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
phy-handle = <&phy0>;
};
@ -422,6 +422,7 @@
&mcu_cpsw {
pinctrl-names = "default";
pinctrl-0 = <&mcu_cpsw_pins_default>;
status = "okay";
};
&mcu_i2c1 {

4
arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi
View File

@ -175,7 +175,7 @@
&main_cpsw_port1 {
phy-handle = <&phy1>;
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
status = "okay";
};
@ -258,7 +258,7 @@
bootph-pre-ram;
};
pmic@48 {
pmic: pmic@48 {
compatible = "ti,tps6594-q1";
reg = <0x48>;
system-power-controller;

3
arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
View File

@ -692,6 +692,7 @@
&mcu_cpsw {
pinctrl-names = "default";
pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
status = "okay";
};
&davinci_mdio {
@ -705,7 +706,7 @@
};
&cpsw_port1 {
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
phy-handle = <&phy0>;
bootph-all;
};

451
arch/arm64/boot/dts/ti/k3-am69-aquila-clover.dts Normal file
View File

@ -0,0 +1,451 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (C) 2025 Toradex
*
* https://www.toradex.com/computer-on-modules/aquila-arm-family/ti-am69
* https://www.toradex.com/products/carrier-board/clover
*/
/dts-v1/;
#include <dt-bindings/pwm/pwm.h>
#include "k3-am69-aquila.dtsi"
/ {
model = "Toradex Aquila AM69 on Clover Board";
compatible = "toradex,aquila-am69-clover",
"toradex,aquila-am69",
"ti,j784s4";
aliases {
eeprom1 = &carrier_eeprom;
};
reg_3v3_dp: regulator-3v3-dp {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_21_dp>;
/* Aquila GPIO_21_DP (AQUILA B57) */
gpio = <&main_gpio0 37 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-max-microvolt = <3300000>;
regulator-min-microvolt = <3300000>;
regulator-name = "DP_3V3";
startup-delay-us = <10000>;
};
/* Aquila DP_1 */
dp-connector {
compatible = "dp-connector";
dp-pwr-supply = <&reg_3v3_dp>;
label = "Display Port";
type = "full-size";
port {
dp_connector_in: endpoint {
remote-endpoint = <&dp0_out>;
};
};
};
};
/* On-module ETH_1 MDIO */
&davinci_mdio {
status = "okay";
};
&dp0_ports {
port@4 {
reg = <4>;
dp0_out: endpoint {
remote-endpoint = <&dp_connector_in>;
};
};
};
&dss {
status = "okay";
};
&main0_thermal {
cooling-maps {
map0 {
cooling-device = <&fan 1 1>;
trip = <&main0_alert0>;
};
map1 {
cooling-device = <&fan 2 2>;
trip = <&main0_alert1>;
};
};
};
&main1_thermal {
cooling-maps {
map0 {
cooling-device = <&fan 1 1>;
trip = <&main1_alert0>;
};
map1 {
cooling-device = <&fan 2 2>;
trip = <&main1_alert1>;
};
};
};
&main2_thermal {
cooling-maps {
map0 {
cooling-device = <&fan 1 1>;
trip = <&main2_alert0>;
};
map1 {
cooling-device = <&fan 2 2>;
trip = <&main2_alert1>;
};
};
};
&main3_thermal {
cooling-maps {
map0 {
cooling-device = <&fan 1 1>;
trip = <&main3_alert0>;
};
map1 {
cooling-device = <&fan 2 2>;
trip = <&main3_alert1>;
};
};
};
&main4_thermal {
cooling-maps {
map0 {
cooling-device = <&fan 1 1>;
trip = <&main4_alert0>;
};
map1 {
cooling-device = <&fan 2 2>;
trip = <&main4_alert1>;
};
};
};
/* Aquila ETH_2 */
&main_cpsw0 {
status = "okay";
};
/* Aquila ETH_2 SGMII PHY */
&main_cpsw0_port8 {
phy-handle = <&cpsw0_port8_phy4>;
status = "okay";
};
/* Aquila ETH_2_XGMII_MDIO */
&main_cpsw0_mdio {
status = "okay";
cpsw0_port8_phy4: ethernet-phy@4 {
reg = <4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_eth2_int>;
interrupt-parent = <&main_gpio0>;
interrupts = <44 IRQ_TYPE_EDGE_FALLING>;
};
};
/* Aquila PWM_1 */
&main_ehrpwm0 {
status = "okay";
};
/* Aquila PWM_2 */
&main_ehrpwm1 {
status = "okay";
};
&main_gpio0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_01>, /* Aquila GPIO_01 */
<&pinctrl_gpio_02>, /* Aquila GPIO_02 */
<&pinctrl_gpio_03>; /* Aquila GPIO_03 */
};
/* Aquila I2C_6 */
&main_i2c5 {
status = "okay";
};
/* Aquila CAN_1 */
&main_mcan10 {
status = "okay";
};
/* Aquila CAN_3 */
&main_mcan13 {
status = "okay";
};
/* Aquila SD_1 */
&main_sdhci1 {
status = "okay";
};
/* Aquila SPI_2 */
&main_spi0 {
status = "okay";
};
/* Aquila SPI_1 */
&main_spi2 {
pinctrl-0 = <&pinctrl_main_spi2>,
<&pinctrl_main_spi2_cs0>,
<&pinctrl_gpio_05>;
cs-gpios = <0>, <&wkup_gpio0 29 GPIO_ACTIVE_LOW>;
status = "okay";
tpm@1 {
compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
reg = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_06>;
interrupt-parent = <&wkup_gpio0>;
interrupts = <30 IRQ_TYPE_EDGE_FALLING>;
spi-max-frequency = <18500000>;
};
};
/* Aquila UART_1 */
&main_uart4 {
status = "okay";
};
/* Aquila UART_3, used as the Linux console */
&main_uart8 {
status = "okay";
};
&mcu_cpsw {
status = "okay";
};
/* On-module ETH_1 RGMII */
&mcu_cpsw_port1 {
status = "okay";
};
/* Aquila I2C_1 */
&mcu_i2c0 {
clock-frequency = <100000>;
status = "okay";
fan_controller: fan@18 {
compatible = "ti,amc6821";
reg = <0x18>;
#pwm-cells = <2>;
fan: fan {
cooling-levels = <102 179 255>;
#cooling-cells = <2>;
pwms = <&fan_controller 40000 PWM_POLARITY_INVERTED>;
};
};
temperature-sensor@4f {
compatible = "ti,tmp1075";
reg = <0x4f>;
};
/* USB-C OTG (TCPC USB PD PHY) */
tcpc@52 {
compatible = "nxp,ptn5110", "tcpci";
reg = <0x52>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb1_int>;
interrupt-parent = <&main_gpio0>;
interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
connector {
compatible = "usb-c-connector";
data-role = "dual";
label = "USB-C OTG";
power-role = "dual";
try-power-role = "sink";
self-powered;
source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
op-sink-microwatt = <1000000>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usb_1_con_hs: endpoint {
remote-endpoint = <&usb0_hs>;
};
};
port@1 {
reg = <1>;
usb_1_con_ss: endpoint {
remote-endpoint = <&usb0_ss_mux>;
};
};
};
};
};
carrier_eeprom: eeprom@57 {
compatible = "st,24c02", "atmel,24c02";
reg = <0x57>;
pagesize = <16>;
};
};
/* Aquila I2C_2 */
&mcu_i2c1 {
status = "okay";
};
/* Aquila CAN_2 */
&mcu_mcan0 {
status = "okay";
};
/* Aquila CAN_4 */
&mcu_mcan1 {
status = "okay";
};
/* Aquila UART_4 */
&mcu_uart0 {
status = "okay";
};
&mhdp {
status = "okay";
};
/* Aquila QSPI_1 */
&ospi0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mcu_ospi0_4bit>, <&pinctrl_mcu_ospi0_cs0>;
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <66000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;
cdns,read-delay = <0>;
cdns,tchsh-ns = <3>;
cdns,tsd2d-ns = <10>;
cdns,tshsl-ns = <30>;
cdns,tslch-ns = <8>;
};
};
/* Aquila PCIE_1 */
&pcie0_rc {
status = "okay";
};
/* Aquila PCIE_2 */
&pcie1_rc {
status = "okay";
};
&serdes2 {
status = "okay";
};
&serdes4 {
status = "okay";
};
&serdes_wiz2 {
status = "okay";
};
&serdes_wiz4 {
status = "okay";
};
/* Aquila ADC_[1-4] */
&tscadc0 {
status = "okay";
};
&usbss0 {
status = "okay";
};
&usb0ss_mux {
status = "okay";
port {
usb0_ss_mux: endpoint {
remote-endpoint = <&usb_1_con_ss>;
};
};
};
&usb0 {
status = "okay";
port {
usb0_hs: endpoint {
remote-endpoint = <&usb_1_con_hs>;
};
};
};
&wkup0_thermal {
cooling-maps {
map0 {
cooling-device = <&fan 1 1>;
trip = <&wkup0_alert0>;
};
map1 {
cooling-device = <&fan 2 2>;
trip = <&wkup0_alert1>;
};
};
};
&wkup1_thermal {
cooling-maps {
map0 {
cooling-device = <&fan 1 1>;
trip = <&wkup1_alert0>;
};
map1 {
cooling-device = <&fan 2 2>;
trip = <&wkup1_alert1>;
};
};
};
&wkup_gpio0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_04>; /* Aquila GPIO_04 */
};
/* Aquila UART_2 */
&wkup_uart0 {
status = "okay";
};

576
arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts Normal file
View File

@ -0,0 +1,576 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (C) 2025 Toradex
*
* https://www.toradex.com/computer-on-modules/aquila-arm-family/ti-am69
* https://www.toradex.com/products/carrier-board/aquila-development-board-kit
*/
/dts-v1/;
#include <dt-bindings/pwm/pwm.h>
#include "k3-am69-aquila.dtsi"
/ {
model = "Toradex Aquila AM69 on Aquila Development Board";
compatible = "toradex,aquila-am69-dev",
"toradex,aquila-am69",
"ti,j784s4";
aliases {
eeprom1 = &carrier_eeprom;
};
reg_1v8_sw: regulator-1v8-sw {
compatible = "regulator-fixed";
regulator-max-microvolt = <1800000>;
regulator-min-microvolt = <1800000>;
regulator-name = "Carrier_1V8";
};
reg_3v3_dp: regulator-3v3-dp {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_21_dp>;
/* Aquila GPIO_21_DP (AQUILA B57) */
gpio = <&main_gpio0 37 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-max-microvolt = <3300000>;
regulator-min-microvolt = <3300000>;
regulator-name = "DP_3V3";
startup-delay-us = <10000>;
};
dp0-connector {
compatible = "dp-connector";
dp-pwr-supply = <&reg_3v3_dp>;
label = "Display Port";
type = "full-size";
port {
dp0_connector_in: endpoint {
remote-endpoint = <&dp0_out>;
};
};
};
sound {
compatible = "simple-audio-card";
simple-audio-card,bitclock-master = <&codec_dai>;
simple-audio-card,format = "i2s";
simple-audio-card,frame-master = <&codec_dai>;
simple-audio-card,name = "aquila-wm8904";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,routing =
"Headphone Jack", "HPOUTL",
"Headphone Jack", "HPOUTR",
"IN2L", "Line In Jack",
"IN2R", "Line In Jack",
"Microphone Jack", "MICBIAS",
"IN1L", "Microphone Jack",
"IN1R", "Digital Mic";
simple-audio-card,widgets =
"Microphone", "Microphone Jack",
"Microphone", "Digital Mic",
"Headphone", "Headphone Jack",
"Line", "Line In Jack";
codec_dai: simple-audio-card,codec {
sound-dai = <&wm8904_1a>;
};
simple-audio-card,cpu {
sound-dai = <&mcasp4>;
};
};
};
/* Aquila CTRL_PWR_BTN_MICO# */
&aquila_key_power {
status = "okay";
};
/* Aquila CTRL_WAKE1_MICO# */
&aquila_key_wake {
status = "okay";
};
/* On-module ETH_1 MDIO */
&davinci_mdio {
status = "okay";
};
&dp0_ports {
port@4 {
reg = <4>;
dp0_out: endpoint {
remote-endpoint = <&dp0_connector_in>;
};
};
};
&dss {
status = "okay";
};
&main0_thermal {
cooling-maps {
map0 {
cooling-device = <&fan 1 1>;
trip = <&main0_alert0>;
};
map1 {
cooling-device = <&fan 2 2>;
trip = <&main0_alert1>;
};
};
};
&main1_thermal {
cooling-maps {
map0 {
cooling-device = <&fan 1 1>;
trip = <&main1_alert0>;
};
map1 {
cooling-device = <&fan 2 2>;
trip = <&main1_alert1>;
};
};
};
&main2_thermal {
cooling-maps {
map0 {
cooling-device = <&fan 1 1>;
trip = <&main2_alert0>;
};
map1 {
cooling-device = <&fan 2 2>;
trip = <&main2_alert1>;
};
};
};
&main3_thermal {
cooling-maps {
map0 {
cooling-device = <&fan 1 1>;
trip = <&main3_alert0>;
};
map1 {
cooling-device = <&fan 2 2>;
trip = <&main3_alert1>;
};
};
};
&main4_thermal {
cooling-maps {
map0 {
cooling-device = <&fan 1 1>;
trip = <&main4_alert0>;
};
map1 {
cooling-device = <&fan 2 2>;
trip = <&main4_alert1>;
};
};
};
/* Aquila ETH_2 */
&main_cpsw0 {
status = "okay";
};
/* Aquila ETH_2 SGMII PHY */
&main_cpsw0_port8 {
phy-handle = <&cpsw0_port8_phy4>;
status = "okay";
};
/* Aquila ETH_2_XGMII_MDIO */
&main_cpsw0_mdio {
status = "okay";
cpsw0_port8_phy4: ethernet-phy@4 {
reg = <4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_eth2_int>;
interrupt-parent = <&main_gpio0>;
interrupts = <44 IRQ_TYPE_EDGE_FALLING>;
};
};
/* Aquila PWM_1 */
&main_ehrpwm0 {
status = "okay";
};
/* Aquila PWM_4_DP */
&main_ehrpwm2 {
status = "okay";
};
/* Aquila PWM_2 */
&main_ehrpwm1 {
status = "okay";
};
/* Aquila PWM_3_DSI */
&main_ehrpwm5 {
status = "okay";
};
&main_gpio0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_01>, /* Aquila GPIO_01 */
<&pinctrl_gpio_02>, /* Aquila GPIO_02 */
<&pinctrl_gpio_03>; /* Aquila GPIO_03 */
};
/* Aquila I2C_3_DSI1 */
&main_i2c0 {
status = "okay";
i2c-mux@70 {
compatible = "nxp,pca9543";
reg = <0x70>;
#address-cells = <1>;
#size-cells = <0>;
/* I2C on DSI Connector Pin #4 and #6 */
i2c_dsi_0: i2c@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
};
/* I2C on DSI Connector Pin #52 and #54 */
i2c_dsi_1: i2c@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
};
};
};
/* Aquila I2C_4_CSI1 */
&main_i2c1 {
status = "okay";
};
/* Aquila I2C_5_CSI2 */
&main_i2c2 {
status = "okay";
};
/* Aquila I2C_6 */
&main_i2c5 {
status = "okay";
};
/* Aquila CAN_1 */
&main_mcan10 {
status = "okay";
};
/* Aquila CAN_3 */
&main_mcan13 {
status = "okay";
};
/* Aquila SD_1 */
&main_sdhci1 {
status = "okay";
};
/* Aquila SPI_2 */
&main_spi0 {
status = "okay";
};
/* Aquila SPI_1 */
&main_spi2 {
status = "okay";
};
/* Aquila UART_1 */
&main_uart4 {
status = "okay";
};
/* Aquila UART_3, used as the Linux console */
&main_uart8 {
status = "okay";
};
/* Aquila I2S_1 */
&mcasp4 {
status = "okay";
};
&mcu_cpsw {
status = "okay";
};
/* On-module ETH_1 RGMII */
&mcu_cpsw_port1 {
status = "okay";
};
/* Aquila I2C_1 */
&mcu_i2c0 {
clock-frequency = <100000>;
status = "okay";
fan_controller: fan@18 {
compatible = "ti,amc6821";
reg = <0x18>;
#pwm-cells = <2>;
fan: fan {
cooling-levels = <102 179 255>;
#cooling-cells = <2>;
pwms = <&fan_controller 40000 PWM_POLARITY_INVERTED>;
};
};
wm8904_1a: audio-codec@1a {
compatible = "wlf,wm8904";
reg = <0x1a>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audio_extrefclk1>;
#sound-dai-cells = <0>;
clocks = <&audio_refclk1>;
clock-names = "mclk";
AVDD-supply = <&reg_1v8_sw>;
CPVDD-supply = <&reg_1v8_sw>;
DBVDD-supply = <&reg_1v8_sw>;
DCVDD-supply = <&reg_1v8_sw>;
MICVDD-supply = <&reg_1v8_sw>;
wlf,drc-cfg-names = "default", "peaklimiter";
/*
* Config registers per name, respectively:
* KNEE_IP = 0, KNEE_OP = 0, HI_COMP = 1, LO_COMP = 1
* KNEE_IP = -24, KNEE_OP = -6, HI_COMP = 1/4, LO_COMP = 1
*/
wlf,drc-cfg-regs = /bits/ 16 <0x01af 0x3248 0x0000 0x0000>,
/bits/ 16 <0x04af 0x324b 0x0010 0x0408>;
/* GPIO1 = DMIC_CLK, don't touch others */
wlf,gpio-cfg = <0x0018>, <0xffff>, <0xffff>, <0xffff>;
wlf,in1r-as-dmicdat2;
};
/* Current measurement into module VCC */
hwmon@41 {
compatible = "ti,ina226";
reg = <0x41>;
shunt-resistor = <5000>;
};
temperature-sensor@4f {
compatible = "ti,tmp1075";
reg = <0x4f>;
};
/* USB-C OTG (TCPC USB PD PHY) */
tcpc@52 {
compatible = "nxp,ptn5110", "tcpci";
reg = <0x52>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb1_int>;
interrupt-parent = <&main_gpio0>;
interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
connector {
compatible = "usb-c-connector";
data-role = "dual";
label = "USB-C OTG";
power-role = "dual";
try-power-role = "sink";
self-powered;
source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
op-sink-microwatt = <1000000>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usb_1_con_hs: endpoint {
remote-endpoint = <&usb0_hs>;
};
};
port@1 {
reg = <1>;
usb_1_con_ss: endpoint {
remote-endpoint = <&usb0_ss_mux>;
};
};
};
};
};
carrier_eeprom: eeprom@57 {
compatible = "st,24c02", "atmel,24c02";
reg = <0x57>;
pagesize = <16>;
};
};
/* Aquila I2C_2 */
&mcu_i2c1 {
status = "okay";
};
/* Aquila CAN_2 */
&mcu_mcan0 {
status = "okay";
};
/* Aquila CAN_4 */
&mcu_mcan1 {
status = "okay";
};
/* Aquila UART_4 */
&mcu_uart0 {
status = "okay";
};
&mhdp {
status = "okay";
};
/* Aquila QSPI_1 */
&ospi0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mcu_ospi0_4bit>, <&pinctrl_mcu_ospi0_cs0>;
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-max-frequency = <66000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;
cdns,read-delay = <0>;
cdns,tchsh-ns = <3>;
cdns,tsd2d-ns = <10>;
cdns,tshsl-ns = <30>;
cdns,tslch-ns = <8>;
};
};
/* Aquila PCIE_1 */
&pcie0_rc {
status = "okay";
};
/* Aquila PCIE_2 */
&pcie1_rc {
status = "okay";
};
&serdes2 {
status = "okay";
};
&serdes4 {
status = "okay";
};
&serdes_wiz2 {
status = "okay";
};
&serdes_wiz4 {
status = "okay";
};
/* Aquila ADC_[1-4] */
&tscadc0 {
status = "okay";
};
&usbss0 {
status = "okay";
};
&usb0ss_mux {
status = "okay";
port {
usb0_ss_mux: endpoint {
remote-endpoint = <&usb_1_con_ss>;
};
};
};
&usb0 {
status = "okay";
port {
usb0_hs: endpoint {
remote-endpoint = <&usb_1_con_hs>;
};
};
};
&wkup0_thermal {
cooling-maps {
map0 {
cooling-device = <&fan 1 1>;
trip = <&wkup0_alert0>;
};
map1 {
cooling-device = <&fan 2 2>;
trip = <&wkup0_alert1>;
};
};
};
&wkup1_thermal {
cooling-maps {
map0 {
cooling-device = <&fan 1 1>;
trip = <&wkup1_alert0>;
};
map1 {
cooling-device = <&fan 2 2>;
trip = <&wkup1_alert1>;
};
};
};
&wkup_gpio0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_04>, /* Aquila GPIO_04 */
<&pinctrl_gpio_05>, /* Aquila GPIO_05 */
<&pinctrl_gpio_06>, /* Aquila GPIO_06 */
<&pinctrl_gpio_07>, /* Aquila GPIO_07 */
<&pinctrl_gpio_08>; /* Aquila GPIO_08 */
};
/* Aquila UART_2, through RS485 transceiver */
&wkup_uart0 {
linux,rs485-enabled-at-boot-time;
rs485-rx-during-tx;
status = "okay";
};

1840
arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi Normal file
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File diff suppressed because it is too large Load Diff

10
arch/arm64/boot/dts/ti/k3-am69-sk.dts
View File

@ -236,8 +236,8 @@
main_i2c0_pins_default: main-i2c0-default-pins {
pinctrl-single,pins = <
J784S4_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AN36) I2C0_SCL */
J784S4_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AP37) I2C0_SDA */
J784S4_IOPAD(0x0e0, PIN_INPUT, 0) /* (AN36) I2C0_SCL */
J784S4_IOPAD(0x0e4, PIN_INPUT, 0) /* (AP37) I2C0_SDA */
>;
};
@ -416,8 +416,8 @@
mcu_i2c0_pins_default: mcu-i2c0-default-pins {
pinctrl-single,pins = <
J784S4_WKUP_IOPAD(0x0a0, PIN_INPUT_PULLUP, 0) /* (M35) MCU_I2C0_SCL */
J784S4_WKUP_IOPAD(0x0a4, PIN_INPUT_PULLUP, 0) /* (G34) MCU_I2C0_SDA */
J784S4_WKUP_IOPAD(0x0a0, PIN_INPUT, 0) /* (M35) MCU_I2C0_SCL */
J784S4_WKUP_IOPAD(0x0a4, PIN_INPUT, 0) /* (G34) MCU_I2C0_SDA */
>;
};
@ -771,7 +771,7 @@
&mcu_cpsw_port1 {
status = "okay";
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
phy-handle = <&mcu_phy0>;
bootph-all;
};

3
arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
View File

@ -323,6 +323,7 @@
&mcu_cpsw {
pinctrl-names = "default";
pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
status = "okay";
};
&davinci_mdio {
@ -334,7 +335,7 @@
};
&cpsw_port1 {
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
phy-handle = <&phy0>;
};

2
arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
View File

@ -432,6 +432,8 @@
"tx4", "tx5", "tx6", "tx7",
"rx";
status = "disabled";
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;

3
arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
View File

@ -663,6 +663,7 @@
&mcu_cpsw {
pinctrl-names = "default";
pinctrl-0 = <&mcu_cpsw_pins_default>;
status = "okay";
};
&davinci_mdio {
@ -677,7 +678,7 @@
};
&cpsw_port1 {
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
phy-handle = <&phy0>;
};

3
arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
View File

@ -769,6 +769,7 @@
&mcu_cpsw {
pinctrl-names = "default";
pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
status = "okay";
};
&davinci_mdio {
@ -780,7 +781,7 @@
};
&cpsw_port1 {
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
phy-handle = <&phy0>;
};

8
arch/arm64/boot/dts/ti/k3-j721e-evm-gesi-exp-board.dtso
View File

@ -37,7 +37,7 @@
&cpsw0_port1 {
status = "okay";
phy-handle = <&cpsw9g_phy12>;
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
mac-address = [00 00 00 00 00 00];
phys = <&cpsw0_phy_gmii_sel 1>;
};
@ -45,7 +45,7 @@
&cpsw0_port2 {
status = "okay";
phy-handle = <&cpsw9g_phy15>;
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
mac-address = [00 00 00 00 00 00];
phys = <&cpsw0_phy_gmii_sel 2>;
};
@ -53,7 +53,7 @@
&cpsw0_port3 {
status = "okay";
phy-handle = <&cpsw9g_phy0>;
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
mac-address = [00 00 00 00 00 00];
phys = <&cpsw0_phy_gmii_sel 3>;
};
@ -61,7 +61,7 @@
&cpsw0_port4 {
status = "okay";
phy-handle = <&cpsw9g_phy3>;
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
mac-address = [00 00 00 00 00 00];
phys = <&cpsw0_phy_gmii_sel 4>;
};

2
arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
View File

@ -551,6 +551,8 @@
"tx4", "tx5", "tx6", "tx7",
"rx";
status = "disabled";
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;

3
arch/arm64/boot/dts/ti/k3-j721e-sk.dts
View File

@ -1034,6 +1034,7 @@
&mcu_cpsw {
pinctrl-names = "default";
pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
status = "okay";
};
&davinci_mdio {
@ -1045,7 +1046,7 @@
};
&cpsw_port1 {
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
phy-handle = <&phy0>;
};

3
arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
View File

@ -457,6 +457,7 @@
&mcu_cpsw {
pinctrl-names = "default";
pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
status = "okay";
};
&davinci_mdio {
@ -469,7 +470,7 @@
};
&cpsw_port1 {
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
phy-handle = <&phy0>;
};

2
arch/arm64/boot/dts/ti/k3-j721s2-evm-gesi-exp-board.dtso
View File

@ -80,6 +80,6 @@
&main_cpsw_port1 {
status = "okay";
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
phy-handle = <&main_cpsw_phy0>;
};

2
arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
View File

@ -552,6 +552,8 @@
"tx4", "tx5", "tx6", "tx7",
"rx";
status = "disabled";
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;

7
arch/arm64/boot/dts/ti/k3-j722s-evm.dts
View File

@ -228,6 +228,11 @@
};
};
&audio_refclk1 {
assigned-clocks = <&k3_clks 157 0>;
assigned-clock-parents = <&k3_clks 157 15>;
};
&cpsw_mac_syscon {
bootph-all;
};
@ -388,7 +393,7 @@
};
&cpsw_port1 {
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
phy-handle = <&cpsw3g_phy0>;
status = "okay";
bootph-all;

18
arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
View File

@ -437,24 +437,6 @@
mux-reg-masks = <0x00 0x3>, /* SERDES0 lane0 select */
<0x10 0x3>; /* SERDES1 lane0 select */
};
audio_refclk0: clock@82e0 {
compatible = "ti,am62-audio-refclk";
reg = <0x82e0 0x4>;
clocks = <&k3_clks 157 0>;
assigned-clocks = <&k3_clks 157 0>;
assigned-clock-parents = <&k3_clks 157 15>;
#clock-cells = <0>;
};
audio_refclk1: clock@82e4 {
compatible = "ti,am62-audio-refclk";
reg = <0x82e4 0x4>;
clocks = <&k3_clks 157 18>;
assigned-clocks = <&k3_clks 157 18>;
assigned-clock-parents = <&k3_clks 157 33>;
#clock-cells = <0>;
};
};
&wkup_conf {

1
arch/arm64/boot/dts/ti/k3-j784s4-evm-pcie0-pcie1-ep.dtso
View File

@ -75,5 +75,6 @@
dma-coherent;
phys = <&serdes0_pcie1_link>;
phy-names = "pcie-phy";
bootph-all;
};
};

18
arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
View File

@ -270,8 +270,8 @@
main_i2c0_pins_default: main-i2c0-default-pins {
pinctrl-single,pins = <
J784S4_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AN36) I2C0_SCL */
J784S4_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AP37) I2C0_SDA */
J784S4_IOPAD(0x0e0, PIN_INPUT, 0) /* (AN36) I2C0_SCL */
J784S4_IOPAD(0x0e4, PIN_INPUT, 0) /* (AP37) I2C0_SDA */
>;
};
@ -920,7 +920,7 @@
&mcu_cpsw_port1 {
status = "okay";
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
phy-handle = <&mcu_phy0>;
};
@ -944,7 +944,7 @@
};
&main_cpsw1_port1 {
phy-mode = "rgmii-rxid";
phy-mode = "rgmii-id";
phy-handle = <&main_cpsw1_phy0>;
status = "okay";
};
@ -970,6 +970,7 @@
&serdes_refclk {
status = "okay";
clock-frequency = <100000000>;
bootph-all;
};
&dss {
@ -984,6 +985,14 @@
<&k3_clks 218 22>;
};
&pcie1_ctrl {
bootph-all;
};
&serdes_ln_ctrl {
bootph-all;
};
&serdes0 {
status = "okay";
@ -993,6 +1002,7 @@
#phy-cells = <0>;
cdns,phy-type = <PHY_TYPE_PCIE>;
resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>;
bootph-all;
};
serdes0_usb_link: phy@3 {

2
arch/arm64/boot/dts/ti/k3-pinctrl.h
View File

@ -123,6 +123,8 @@
#define AM62PX_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define AM62PX_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define AM62LX_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define AM62X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define AM62X_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))