mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-01-12 01:20:14 +00:00
RISC-V SpacemiT DT changes for 6.19
- Add Uart and I2C nodes - Add P1 PMIC nodes - Add MusePi Pro board support - Add OrangePi R2S board support - Enable eeprom for BPI-F3 - Enable QSPI on BPI-F3 - Enable Ethernet and PDMA on OrangePi RV2 -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQKvBAABCgCZFiEEtbq4ycMbcRVnAiPcMarqR1lNu+0FAmkVq/IbFIAAAAAABAAO bWFudTIsMi41KzEuMTEsMiwyXxSAAAAAAC4AKGlzc3Vlci1mcHJAbm90YXRpb25z Lm9wZW5wZ3AuZmlmdGhob3JzZW1hbi5uZXRCNUJBQjhDOUMzMUI3MTE1NjcwMjIz REMzMUFBRUE0NzU5NERCQkVEAAoJEDGq6kdZTbvtaFgP/ibSDS7gp+DxD0lZaPZg lJUIyrKeihNvJUlxnMSBzXhpLPFld8pU+syExKP4ZuPE7aw3kuRESrQdb2CP0hxK n1XE/MBfBYpHNBTUjy0QkLYGw++cTjKmvYtnwiv9szTFje5f0O15D3GJbyAFDfPN FE8VMWEgDO1WkVhHk0MT0gWhPouwHPepd5kBdqU17pr4Uys0ZlodDZ9YJjff1Xxa ZufFSpAt9B8nrbFCQzspQEoQa3um1J0vSBsJhcGsAjgByjANgh398eDeSDhiH47z jxRi1bl3KWDmnE2GyrC5CZ5LgUON6cBRTYvYwixKYX+nLhMZLG3EfFCdNtscVA53 7qK3dLutWSwIjBUbh3TCI4uyRKhYvBpmyI0UWb+nF25EITQkTVBAZhlExizkmupU wsZhoRS+5vrLRfjibhi+iP3Rqfx8YAPV+jwZIfmm/wTzpZt/uHkLaJ88J8Xa/clV EjQ6u8Mfcuv0VA9e5LW7ABBv/iy74libbYRRkf0ydRD+UOL7YOiwjvZ47JvWdbSg D9fo9iI9bDm3uYmSIlCs3jCGRmzdvWCAiZibLld44gSlqOjtNH1HPDtnHi/rI9sd uPeIbCXLZ2k/n9Yj6O5RH3Rtn99gpdXzshsXCBZwHJaXfnOT7CuSPBQpANLTNgKB 79hdj7oawQEmOyKxCJw+wU1K =9Ihp -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmkgiJIACgkQmmx57+YA GNnd5g//Vy+DwyBnBHs2XP4i2WMjEOqfkWyvs12zEhNdpIqPIf6c2eHeC3blxBy4 iytwykoTOqp0Me8gl3LXDDizTt/s9jzFkc0PvSholLO05hN9PnGk8qbN1Rwfsl8T enz/2W7oA5mcq0HJD5O0OECPOC1/0dmVM4lg/oOuZyaHRw5LL3r+jnyPIXh0QvNs tDVqzNmXXAqCRlJcc9nipapH4NbzRrDOBkk2LPAh/mFX0PWCMHA2aOyQ7YRqLFLU eCbxaW7E/3Dw3WCCvB0ASrb7MgtdilSIzUZbCkCzsvB4O4/jmO34hPs7ATcLP7u6 qpciJwVMTooQD7W4xe64jBrIkwzOhNjMDW0SXV5o1cOuzl0aoEz9XGC0zEy3muyX caLo8mCSyGWzmZPGPOP7GY/8w46GlZ5RMjc2UXxhxk+omRkydotjJTo53jFufoUZ XZd7SnCymuPhaAtUz+zLi9iwDgHsiD/yGdupgJRoZJKh9kG17CMLB3shMW61IEF/ va/V3uXtlv0Zzd69NAwSGLdEvRspa91e6NArSVhLP/gHrzNLqKEliFz0aaVm5ccM yufaTiKZdawuWQp5t+wR45q9/mm9KG0qrGDfnNzGtH38FSJF4KY+EKTPJ9IvtBw0 oRWiqORWb5Km8JDWzUb6fEdtA0l1vXvohPHAZtj1WAUN2EQwuFw= =gjoT -----END PGP SIGNATURE----- Merge tag 'spacemit-dt-for-6.19-1' of https://github.com/spacemit-com/linux into soc/dt RISC-V SpacemiT DT changes for 6.19 - Add Uart and I2C nodes - Add P1 PMIC nodes - Add MusePi Pro board support - Add OrangePi R2S board support - Enable eeprom for BPI-F3 - Enable QSPI on BPI-F3 - Enable Ethernet and PDMA on OrangePi RV2 * tag 'spacemit-dt-for-6.19-1' of https://github.com/spacemit-com/linux: riscv: dts: spacemit: define all missing I2C controller nodes riscv: dts: spacemit: reorder i2c2 node riscv: dts: spacemit: Add OrangePi R2S board device tree dt-bindings: riscv: spacemit: Add OrangePi R2S board riscv: dts: spacemit: enable K1 SoC QSPI on BPI-F3 riscv: dts: spacemit: add MusePi Pro board device tree dt-bindings: riscv: spacemit: add MusePi Pro board riscv: dts: spacemit: add Ethernet and PDMA to OrangePi RV2 riscv: dts: spacemit: add i2c aliases on BPI-F3 riscv: dts: spacemit: add 24c02 eeprom on BPI-F3 riscv: dts: spacemit: enable the i2c2 adapter on BPI-F3 riscv: dts: spacemit: define regulator constraints riscv: dts: spacemit: define fixed regulators riscv: dts: spacemit: enable the i2c8 adapter riscv: dts: spacemit: add UART pinctrl combinations Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
441bd15680
@ -22,6 +22,8 @@ properties:
|
||||
- enum:
|
||||
- bananapi,bpi-f3
|
||||
- milkv,jupiter
|
||||
- spacemit,musepi-pro
|
||||
- xunlong,orangepi-r2s
|
||||
- xunlong,orangepi-rv2
|
||||
- const: spacemit,k1
|
||||
|
||||
|
||||
@ -1,4 +1,6 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
dtb-$(CONFIG_ARCH_SPACEMIT) += k1-bananapi-f3.dtb
|
||||
dtb-$(CONFIG_ARCH_SPACEMIT) += k1-milkv-jupiter.dtb
|
||||
dtb-$(CONFIG_ARCH_SPACEMIT) += k1-musepi-pro.dtb
|
||||
dtb-$(CONFIG_ARCH_SPACEMIT) += k1-orangepi-r2s.dtb
|
||||
dtb-$(CONFIG_ARCH_SPACEMIT) += k1-orangepi-rv2.dtb
|
||||
|
||||
@ -14,6 +14,8 @@
|
||||
ethernet0 = ð0;
|
||||
ethernet1 = ð1;
|
||||
serial0 = &uart0;
|
||||
i2c2 = &i2c2;
|
||||
i2c8 = &i2c8;
|
||||
};
|
||||
|
||||
chosen {
|
||||
@ -30,6 +32,25 @@
|
||||
default-state = "on";
|
||||
};
|
||||
};
|
||||
|
||||
reg_dc_in: dc-in-12v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "dc_in_12v";
|
||||
regulator-min-microvolt = <12000000>;
|
||||
regulator-max-microvolt = <12000000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_vcc_4v: vcc-4v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_4v";
|
||||
regulator-min-microvolt = <4000000>;
|
||||
regulator-max-microvolt = <4000000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
vin-supply = <®_dc_in>;
|
||||
};
|
||||
};
|
||||
|
||||
&emmc {
|
||||
@ -92,6 +113,157 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&qspi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&qspi_cfg>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
pinctrl-0 = <&i2c2_0_cfg>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x50>;
|
||||
vcc-supply = <&buck3_1v8>; /* EEPROM_VCC1V8 */
|
||||
pagesize = <16>;
|
||||
read-only;
|
||||
size = <256>;
|
||||
|
||||
nvmem-layout {
|
||||
compatible = "onie,tlv-layout";
|
||||
|
||||
mac-address {
|
||||
#nvmem-cell-cells = <1>;
|
||||
};
|
||||
|
||||
num-macs {
|
||||
};
|
||||
|
||||
serial-number {
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c8 {
|
||||
pinctrl-0 = <&i2c8_cfg>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
pmic@41 {
|
||||
compatible = "spacemit,p1";
|
||||
reg = <0x41>;
|
||||
interrupts = <64>;
|
||||
vin-supply = <®_vcc_4v>;
|
||||
|
||||
regulators {
|
||||
buck1 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3450000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck2 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3450000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck3_1v8: buck3 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck4 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck5 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3450000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck6 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3450000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
aldo1 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
aldo2 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
};
|
||||
|
||||
aldo3 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
};
|
||||
|
||||
aldo4 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
};
|
||||
|
||||
dldo1 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
dldo2 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
};
|
||||
|
||||
dldo3 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
};
|
||||
|
||||
dldo4 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dldo5 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
};
|
||||
|
||||
dldo6 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dldo7 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_2_cfg>;
|
||||
|
||||
79
arch/riscv/boot/dts/spacemit/k1-musepi-pro.dts
Normal file
79
arch/riscv/boot/dts/spacemit/k1-musepi-pro.dts
Normal file
@ -0,0 +1,79 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
||||
/*
|
||||
* Copyright (C) 2024 Yangyu Chen <cyy@cyyself.name>
|
||||
* Copyright (C) 2025 SpacemiT, Inc
|
||||
* Copyright (C) 2025 Troy Mitchell <troy.mitchell@linux.spacemit.com>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "k1.dtsi"
|
||||
#include "k1-pinctrl.dtsi"
|
||||
|
||||
/ {
|
||||
model = "SpacemiT MusePi Pro";
|
||||
compatible = "spacemit,musepi-pro", "spacemit,k1";
|
||||
|
||||
aliases {
|
||||
ethernet0 = ð0;
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0";
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led1 {
|
||||
label = "sys-led";
|
||||
gpios = <&gpio K1_GPIO(96) GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
default-state = "on";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&emmc {
|
||||
bus-width = <8>;
|
||||
mmc-hs400-1_8v;
|
||||
mmc-hs400-enhanced-strobe;
|
||||
non-removable;
|
||||
no-sd;
|
||||
no-sdio;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ð0 {
|
||||
phy-handle = <&rgmii0>;
|
||||
phy-mode = "rgmii-id";
|
||||
pinctrl-0 = <&gmac0_cfg>;
|
||||
pinctrl-names = "default";
|
||||
rx-internal-delay-ps = <0>;
|
||||
tx-internal-delay-ps = <0>;
|
||||
status = "okay";
|
||||
|
||||
mdio-bus {
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x0>;
|
||||
|
||||
reset-gpios = <&gpio K1_GPIO(110) GPIO_ACTIVE_LOW>;
|
||||
reset-delay-us = <10000>;
|
||||
reset-post-delay-us = <100000>;
|
||||
|
||||
rgmii0: phy@1 {
|
||||
reg = <0x1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pdma {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-0 = <&uart0_2_cfg>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
90
arch/riscv/boot/dts/spacemit/k1-orangepi-r2s.dts
Normal file
90
arch/riscv/boot/dts/spacemit/k1-orangepi-r2s.dts
Normal file
@ -0,0 +1,90 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
||||
/*
|
||||
* Copyright (C) 2025 Michael Opdenacker <michael.opdenacker@rootcommit.com>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "k1.dtsi"
|
||||
#include "k1-pinctrl.dtsi"
|
||||
|
||||
/ {
|
||||
model = "OrangePi R2S";
|
||||
compatible = "xunlong,orangepi-r2s", "spacemit,k1";
|
||||
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
ethernet0 = ð0;
|
||||
ethernet1 = ð1;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0";
|
||||
};
|
||||
};
|
||||
|
||||
&emmc {
|
||||
bus-width = <8>;
|
||||
mmc-hs400-1_8v;
|
||||
mmc-hs400-enhanced-strobe;
|
||||
non-removable;
|
||||
no-sd;
|
||||
no-sdio;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ð0 {
|
||||
phy-handle = <&rgmii0>;
|
||||
phy-mode = "rgmii-id";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gmac0_cfg>;
|
||||
rx-internal-delay-ps = <0>;
|
||||
tx-internal-delay-ps = <0>;
|
||||
status = "okay";
|
||||
|
||||
mdio-bus {
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x0>;
|
||||
|
||||
reset-gpios = <&gpio K1_GPIO(110) GPIO_ACTIVE_LOW>;
|
||||
reset-delay-us = <10000>;
|
||||
reset-post-delay-us = <100000>;
|
||||
|
||||
rgmii0: phy@1 {
|
||||
reg = <0x1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ð1 {
|
||||
phy-handle = <&rgmii1>;
|
||||
phy-mode = "rgmii-id";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gmac1_cfg>;
|
||||
rx-internal-delay-ps = <0>;
|
||||
tx-internal-delay-ps = <250>;
|
||||
status = "okay";
|
||||
|
||||
mdio-bus {
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x0>;
|
||||
|
||||
reset-gpios = <&gpio K1_GPIO(115) GPIO_ACTIVE_LOW>;
|
||||
reset-delay-us = <10000>;
|
||||
reset-post-delay-us = <100000>;
|
||||
|
||||
rgmii1: phy@1 {
|
||||
reg = <0x1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pdma {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_2_cfg>;
|
||||
status = "okay";
|
||||
};
|
||||
@ -15,6 +15,8 @@
|
||||
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
ethernet0 = ð0;
|
||||
ethernet1 = ð1;
|
||||
};
|
||||
|
||||
chosen {
|
||||
@ -33,6 +35,56 @@
|
||||
};
|
||||
};
|
||||
|
||||
ð0 {
|
||||
phy-handle = <&rgmii0>;
|
||||
phy-mode = "rgmii-id";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gmac0_cfg>;
|
||||
rx-internal-delay-ps = <0>;
|
||||
tx-internal-delay-ps = <0>;
|
||||
status = "okay";
|
||||
|
||||
mdio-bus {
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x0>;
|
||||
|
||||
reset-gpios = <&gpio K1_GPIO(110) GPIO_ACTIVE_LOW>;
|
||||
reset-delay-us = <10000>;
|
||||
reset-post-delay-us = <100000>;
|
||||
|
||||
rgmii0: phy@1 {
|
||||
reg = <0x1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ð1 {
|
||||
phy-handle = <&rgmii1>;
|
||||
phy-mode = "rgmii-id";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gmac1_cfg>;
|
||||
rx-internal-delay-ps = <0>;
|
||||
tx-internal-delay-ps = <250>;
|
||||
status = "okay";
|
||||
|
||||
mdio-bus {
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x0>;
|
||||
|
||||
reset-gpios = <&gpio K1_GPIO(115) GPIO_ACTIVE_LOW>;
|
||||
reset-delay-us = <10000>;
|
||||
reset-post-delay-us = <100000>;
|
||||
|
||||
rgmii1: phy@1 {
|
||||
reg = <0x1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pdma {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_2_cfg>;
|
||||
|
||||
@ -59,11 +59,472 @@
|
||||
};
|
||||
};
|
||||
|
||||
i2c2_0_cfg: i2c2-0-cfg {
|
||||
i2c2-0-pins {
|
||||
pinmux = <K1_PADCONF(84, 4)>, /* I2C2_SCL */
|
||||
<K1_PADCONF(85, 4)>; /* I2C2_SDA */
|
||||
};
|
||||
};
|
||||
|
||||
i2c8_cfg: i2c8-cfg {
|
||||
i2c8-0-pins {
|
||||
pinmux = <K1_PADCONF(93, 0)>, /* PWR_SCL */
|
||||
<K1_PADCONF(94, 0)>; /* PWR_SDA */
|
||||
};
|
||||
};
|
||||
|
||||
qspi_cfg: qspi-cfg {
|
||||
qspi-pins {
|
||||
pinmux = <K1_PADCONF(98, 0)>, /* QSPI_DATA3 */
|
||||
<K1_PADCONF(99, 0)>, /* QSPI_DATA2 */
|
||||
<K1_PADCONF(100, 0)>, /* QSPI_DATA1 */
|
||||
<K1_PADCONF(101, 0)>, /* QSPI_DATA0 */
|
||||
<K1_PADCONF(102, 0)>; /* QSPI_CLK */
|
||||
|
||||
bias-disable;
|
||||
drive-strength = <19>;
|
||||
power-source = <3300>;
|
||||
};
|
||||
|
||||
qspi-cs1-pins {
|
||||
pinmux = <K1_PADCONF(103, 0)>; /* QSPI_CS1 */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <19>;
|
||||
power-source = <3300>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart0_0_cfg: uart0-0-cfg {
|
||||
uart0-0-pins {
|
||||
pinmux = <K1_PADCONF(104, 3)>, /* uart0_txd */
|
||||
<K1_PADCONF(105, 3)>; /* uart0_rxd */
|
||||
power-source = <3300>;
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <19>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart0_1_cfg: uart0-1-cfg {
|
||||
uart0-1-pins {
|
||||
pinmux = <K1_PADCONF(108, 1)>, /* uart0_txd */
|
||||
<K1_PADCONF(80, 3)>; /* uart0_rxd */
|
||||
power-source = <3300>;
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <19>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart0_2_cfg: uart0-2-cfg {
|
||||
uart0-2-pins {
|
||||
pinmux = <K1_PADCONF(68, 2)>,
|
||||
<K1_PADCONF(69, 2)>;
|
||||
pinmux = <K1_PADCONF(68, 2)>, /* uart0_txd */
|
||||
<K1_PADCONF(69, 2)>; /* uart0_rxd */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart2_0_cfg: uart2-0-cfg {
|
||||
uart2-0-pins {
|
||||
pinmux = <K1_PADCONF(21, 1)>, /* uart2_txd */
|
||||
<K1_PADCONF(22, 1)>; /* uart2_rxd */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart2_0_cts_rts_cfg: uart2-0-cts-rts-cfg {
|
||||
uart2-0-pins {
|
||||
pinmux = <K1_PADCONF(23, 1)>, /* uart2_cts */
|
||||
<K1_PADCONF(24, 1)>; /* uart2_rts */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart3_0_cfg: uart3-0-cfg {
|
||||
uart3-0-pins {
|
||||
pinmux = <K1_PADCONF(81, 2)>, /* uart3_txd */
|
||||
<K1_PADCONF(82, 2)>; /* uart3_rxd */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart3_0_cts_rts_cfg: uart3-0-cts-rts-cfg {
|
||||
uart3-0-pins {
|
||||
pinmux = <K1_PADCONF(83, 2)>, /* uart3_cts */
|
||||
<K1_PADCONF(84, 2)>; /* uart3_rts */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart3_1_cfg: uart3-1-cfg {
|
||||
uart3-1-pins {
|
||||
pinmux = <K1_PADCONF(18, 2)>, /* uart3_txd */
|
||||
<K1_PADCONF(19, 2)>; /* uart3_rxd */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart3_1_cts_rts_cfg: uart3-1-cts-rts-cfg {
|
||||
uart3-1-pins {
|
||||
pinmux = <K1_PADCONF(20, 2)>, /* uart3_cts */
|
||||
<K1_PADCONF(21, 2)>; /* uart3_rts */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart3_2_cfg: uart3-2-cfg {
|
||||
uart3-2-pins {
|
||||
pinmux = <K1_PADCONF(53, 4)>, /* uart3_txd */
|
||||
<K1_PADCONF(54, 4)>; /* uart3_rxd */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart3_2_cts_rts_cfg: uart3-2-cts-rts-cfg {
|
||||
uart3-2-pins {
|
||||
pinmux = <K1_PADCONF(55, 4)>, /* uart3_cts */
|
||||
<K1_PADCONF(56, 4)>; /* uart3_rts */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart4_0_cfg: uart4-0-cfg {
|
||||
uart4-0-pins {
|
||||
pinmux = <K1_PADCONF(100, 4)>, /* uart4_txd */
|
||||
<K1_PADCONF(101, 4)>; /* uart4_rxd */
|
||||
power-source = <3300>;
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <19>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart4_1_cfg: uart4-1-cfg {
|
||||
uart4-1-pins {
|
||||
pinmux = <K1_PADCONF(83, 3)>, /* uart4_txd */
|
||||
<K1_PADCONF(84, 3)>; /* uart4_rxd */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart4_1_cts_rts_cfg: uart4-1-cts-rts-cfg {
|
||||
uart4-1-pins {
|
||||
pinmux = <K1_PADCONF(81, 3)>, /* uart4_cts */
|
||||
<K1_PADCONF(82, 3)>; /* uart4_rts */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart4_2_cfg: uart4-2-cfg {
|
||||
uart4-2-pins {
|
||||
pinmux = <K1_PADCONF(23, 2)>, /* uart4_txd */
|
||||
<K1_PADCONF(24, 2)>; /* uart4_rxd */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart4_3_cfg: uart4-3-cfg {
|
||||
uart4-3-pins {
|
||||
pinmux = <K1_PADCONF(33, 2)>, /* uart4_txd */
|
||||
<K1_PADCONF(34, 2)>; /* uart4_rxd */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart4_3_cts_rts_cfg: uart4-3-cts-rts-cfg {
|
||||
uart4-3-pins {
|
||||
pinmux = <K1_PADCONF(35, 2)>, /* uart4_cts */
|
||||
<K1_PADCONF(36, 2)>; /* uart4_rts */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart4_4_cfg: uart4-4-cfg {
|
||||
uart4-4-pins {
|
||||
pinmux = <K1_PADCONF(111, 4)>, /* uart4_txd */
|
||||
<K1_PADCONF(112, 4)>; /* uart4_rxd */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart4_4_cts_rts_cfg: uart4-4-cts-rts-cfg {
|
||||
uart4-4-pins {
|
||||
pinmux = <K1_PADCONF(113, 4)>, /* uart4_cts */
|
||||
<K1_PADCONF(114, 4)>; /* uart4_rts */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart5_0_cfg: uart5-0-cfg {
|
||||
uart5-0-pins {
|
||||
pinmux = <K1_PADCONF(102, 3)>, /* uart5_txd */
|
||||
<K1_PADCONF(103, 3)>; /* uart5_rxd */
|
||||
power-source = <3300>;
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <19>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart5_1_cfg: uart5-1-cfg {
|
||||
uart5-1-pins {
|
||||
pinmux = <K1_PADCONF(25, 2)>, /* uart5_txd */
|
||||
<K1_PADCONF(26, 2)>; /* uart5_rxd */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart5_1_cts_rts_cfg: uart5-1-cts-rts-cfg {
|
||||
uart5-1-pins {
|
||||
pinmux = <K1_PADCONF(27, 2)>, /* uart5_cts */
|
||||
<K1_PADCONF(28, 2)>; /* uart5_rts */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart5_2_cfg: uart5-2-cfg {
|
||||
uart5-2-pins {
|
||||
pinmux = <K1_PADCONF(42, 2)>, /* uart5_txd */
|
||||
<K1_PADCONF(43, 2)>; /* uart5_rxd */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart5_2_cts_rts_cfg: uart5-2-cts-rts-cfg {
|
||||
uart5-2-pins {
|
||||
pinmux = <K1_PADCONF(44, 2)>, /* uart5_cts */
|
||||
<K1_PADCONF(45, 2)>; /* uart5_rts */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart5_3_cfg: uart5-3-cfg {
|
||||
uart5-3-pins {
|
||||
pinmux = <K1_PADCONF(70, 4)>, /* uart5_txd */
|
||||
<K1_PADCONF(71, 4)>; /* uart5_rxd */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart5_3_cts_rts_cfg: uart5-3-cts-rts-cfg {
|
||||
uart5-3-pins {
|
||||
pinmux = <K1_PADCONF(72, 4)>, /* uart5_cts */
|
||||
<K1_PADCONF(73, 4)>; /* uart5_rts */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart6_0_cfg: uart6-0-cfg {
|
||||
uart6-0-pins {
|
||||
pinmux = <K1_PADCONF(86, 2)>, /* uart6_txd */
|
||||
<K1_PADCONF(87, 2)>; /* uart6_rxd */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart6_0_cts_rts_cfg: uart6-0-cts-rts-cfg {
|
||||
uart6-0-pins {
|
||||
pinmux = <K1_PADCONF(85, 2)>, /* uart6_cts */
|
||||
<K1_PADCONF(90, 2)>; /* uart6_rts */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart6_1_cfg: uart6-1-cfg {
|
||||
uart6-1-pins {
|
||||
pinmux = <K1_PADCONF(0, 2)>, /* uart6_txd */
|
||||
<K1_PADCONF(1, 2)>; /* uart6_rxd */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart6_1_cts_rts_cfg: uart6-1-cts-rts-cfg {
|
||||
uart6-1-pins {
|
||||
pinmux = <K1_PADCONF(2, 2)>, /* uart6_cts */
|
||||
<K1_PADCONF(3, 2)>; /* uart6_rts */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart6_2_cfg: uart6-2-cfg {
|
||||
uart6-2-pins {
|
||||
pinmux = <K1_PADCONF(56, 2)>, /* uart6_txd */
|
||||
<K1_PADCONF(57, 2)>; /* uart6_rxd */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart7_0_cfg: uart7-0-cfg {
|
||||
uart7-0-pins {
|
||||
pinmux = <K1_PADCONF(88, 2)>, /* uart7_txd */
|
||||
<K1_PADCONF(89, 2)>; /* uart7_rxd */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart7_1_cfg: uart7-1-cfg {
|
||||
uart7-1-pins {
|
||||
pinmux = <K1_PADCONF(4, 2)>, /* uart7_txd */
|
||||
<K1_PADCONF(5, 2)>; /* uart7_rxd */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart7_1_cts_rts_cfg: uart7-1-cts-rts-cfg {
|
||||
uart7-1-pins {
|
||||
pinmux = <K1_PADCONF(6, 2)>, /* uart7_cts */
|
||||
<K1_PADCONF(7, 2)>; /* uart7_rts */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart8_0_cfg: uart8-0-cfg {
|
||||
uart8-0-pins {
|
||||
pinmux = <K1_PADCONF(82, 4)>, /* uart8_txd */
|
||||
<K1_PADCONF(83, 4)>; /* uart8_rxd */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart8_1_cfg: uart8-1-cfg {
|
||||
uart8-1-pins {
|
||||
pinmux = <K1_PADCONF(8, 2)>, /* uart8_txd */
|
||||
<K1_PADCONF(9, 2)>; /* uart8_rxd */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart8_1_cts_rts_cfg: uart8-1-cts-rts-cfg {
|
||||
uart8-1-pins {
|
||||
pinmux = <K1_PADCONF(10, 2)>, /* uart8_cts */
|
||||
<K1_PADCONF(11, 2)>; /* uart8_rts */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart8_2_cfg: uart8-2-cfg {
|
||||
uart8-2-pins {
|
||||
pinmux = <K1_PADCONF(75, 4)>, /* uart8_txd */
|
||||
<K1_PADCONF(76, 4)>; /* uart8_rxd */
|
||||
power-source = <3300>;
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <19>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart8_2_cts_rts_cfg: uart8-2-cts-rts-cfg {
|
||||
uart8-2-pins {
|
||||
pinmux = <K1_PADCONF(77, 4)>, /* uart8_cts */
|
||||
<K1_PADCONF(78, 4)>; /* uart8_rts */
|
||||
power-source = <3300>;
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <19>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart9_0_cfg: uart9-0-cfg {
|
||||
uart9-0-pins {
|
||||
pinmux = <K1_PADCONF(12, 2)>, /* uart9_txd */
|
||||
<K1_PADCONF(13, 2)>; /* uart9_rxd */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart9_1_cfg: uart9-1-cfg {
|
||||
uart9-1-pins {
|
||||
pinmux = <K1_PADCONF(116, 3)>, /* uart9_txd */
|
||||
<K1_PADCONF(117, 3)>; /* uart9_rxd */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart9_1_cts_rts_cfg: uart9-1-cts-rts-cfg {
|
||||
uart9-1-pins {
|
||||
pinmux = <K1_PADCONF(110, 3)>, /* uart9_cts */
|
||||
<K1_PADCONF(115, 3)>; /* uart9_rts */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart9_2_cfg: uart9-2-cfg {
|
||||
uart9-2-pins {
|
||||
pinmux = <K1_PADCONF(72, 2)>, /* uart9_txd */
|
||||
<K1_PADCONF(73, 2)>; /* uart9_rxd */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
|
||||
@ -358,6 +358,71 @@
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
i2c0: i2c@d4010800 {
|
||||
compatible = "spacemit,k1-i2c";
|
||||
reg = <0x0 0xd4010800 0x0 0x38>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&syscon_apbc CLK_TWSI0>,
|
||||
<&syscon_apbc CLK_TWSI0_BUS>;
|
||||
clock-names = "func", "bus";
|
||||
clock-frequency = <400000>;
|
||||
interrupts = <36>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c1: i2c@d4011000 {
|
||||
compatible = "spacemit,k1-i2c";
|
||||
reg = <0x0 0xd4011000 0x0 0x38>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&syscon_apbc CLK_TWSI1>,
|
||||
<&syscon_apbc CLK_TWSI1_BUS>;
|
||||
clock-names = "func", "bus";
|
||||
clock-frequency = <400000>;
|
||||
interrupts = <37>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c2: i2c@d4012000 {
|
||||
compatible = "spacemit,k1-i2c";
|
||||
reg = <0x0 0xd4012000 0x0 0x38>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&syscon_apbc CLK_TWSI2>,
|
||||
<&syscon_apbc CLK_TWSI2_BUS>;
|
||||
clock-names = "func", "bus";
|
||||
clock-frequency = <400000>;
|
||||
interrupts = <38>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c4: i2c@d4012800 {
|
||||
compatible = "spacemit,k1-i2c";
|
||||
reg = <0x0 0xd4012800 0x0 0x38>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&syscon_apbc CLK_TWSI4>,
|
||||
<&syscon_apbc CLK_TWSI4_BUS>;
|
||||
clock-names = "func", "bus";
|
||||
clock-frequency = <400000>;
|
||||
interrupts = <40>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c5: i2c@d4013800 {
|
||||
compatible = "spacemit,k1-i2c";
|
||||
reg = <0x0 0xd4013800 0x0 0x38>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&syscon_apbc CLK_TWSI5>,
|
||||
<&syscon_apbc CLK_TWSI5_BUS>;
|
||||
clock-names = "func", "bus";
|
||||
clock-frequency = <400000>;
|
||||
interrupts = <41>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
syscon_apbc: system-controller@d4015000 {
|
||||
compatible = "spacemit,k1-syscon-apbc";
|
||||
reg = <0x0 0xd4015000 0x0 0x1000>;
|
||||
@ -369,6 +434,19 @@
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
i2c6: i2c@d4018800 {
|
||||
compatible = "spacemit,k1-i2c";
|
||||
reg = <0x0 0xd4018800 0x0 0x38>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&syscon_apbc CLK_TWSI6>,
|
||||
<&syscon_apbc CLK_TWSI6_BUS>;
|
||||
clock-names = "func", "bus";
|
||||
clock-frequency = <400000>;
|
||||
interrupts = <70>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpio: gpio@d4019000 {
|
||||
compatible = "spacemit,k1-gpio";
|
||||
reg = <0x0 0xd4019000 0x0 0x100>;
|
||||
@ -459,6 +537,32 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c7: i2c@d401d000 {
|
||||
compatible = "spacemit,k1-i2c";
|
||||
reg = <0x0 0xd401d000 0x0 0x38>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&syscon_apbc CLK_TWSI7>,
|
||||
<&syscon_apbc CLK_TWSI7_BUS>;
|
||||
clock-names = "func", "bus";
|
||||
clock-frequency = <400000>;
|
||||
interrupts = <18>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c8: i2c@d401d800 {
|
||||
compatible = "spacemit,k1-i2c";
|
||||
reg = <0x0 0xd401d800 0x0 0x38>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&syscon_apbc CLK_TWSI8>,
|
||||
<&syscon_apbc CLK_TWSI8_BUS>;
|
||||
clock-names = "func", "bus";
|
||||
clock-frequency = <400000>;
|
||||
interrupts = <19>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pinctrl: pinctrl@d401e000 {
|
||||
compatible = "spacemit,k1-pinctrl";
|
||||
reg = <0x0 0xd401e000 0x0 0x400>;
|
||||
@ -643,6 +747,8 @@
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
/* sec_i2c3: 0xf0614000, not available from Linux */
|
||||
|
||||
camera-bus {
|
||||
compatible = "simple-bus";
|
||||
ranges;
|
||||
@ -797,6 +903,22 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
qspi: spi@d420c000 {
|
||||
compatible = "spacemit,k1-qspi";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x0 0xd420c000 0x0 0x1000>,
|
||||
<0x0 0xb8000000 0x0 0xc00000>;
|
||||
reg-names = "QuadSPI", "QuadSPI-memory";
|
||||
clocks = <&syscon_apmu CLK_QSPI_BUS>,
|
||||
<&syscon_apmu CLK_QSPI>;
|
||||
clock-names = "qspi_en", "qspi";
|
||||
resets = <&syscon_apmu RESET_QSPI>,
|
||||
<&syscon_apmu RESET_QSPI_BUS>;
|
||||
interrupts = <117>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* sec_uart1: 0xf0612000, not available from Linux */
|
||||
};
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user