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pinctrl: samsung: add exynos8890 SoC pinctrl configuration
Add support for the pin-controller found on the exynos8890 SoC, used in Samsung Galaxy S7. Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com> Reviewed-by: Igor Belwon <igor.belwon@mentallysanemainliners.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
This commit is contained in:
Ivaylo Ivanov
Krzysztof Kozlowski
parent
f416d35e65
commit
5b6b7d39ce
@ -1485,6 +1485,163 @@ const struct samsung_pinctrl_of_match_data exynosautov920_of_data __initconst =
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.num_ctrl = ARRAY_SIZE(exynosautov920_pin_ctrl),
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};
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/* pin banks of exynos8890 pin-controller 0 (ALIVE) */
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static const struct samsung_pin_bank_data exynos8890_pin_banks0[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS7870_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00),
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EXYNOS7870_PIN_BANK_EINTW(8, 0x020, "gpa1", 0x04),
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EXYNOS7870_PIN_BANK_EINTW(8, 0x040, "gpa2", 0x08),
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EXYNOS7870_PIN_BANK_EINTW(8, 0x060, "gpa3", 0x0c),
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};
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/* pin banks of exynos8890 pin-controller 1 (AUD) */
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static const struct samsung_pin_bank_data exynos8890_pin_banks1[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS8895_PIN_BANK_EINTG(7, 0x000, "gph0", 0x00),
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};
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/* pin banks of exynos8890 pin-controller 2 (CCORE) */
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static const struct samsung_pin_bank_data exynos8890_pin_banks2[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS8895_PIN_BANK_EINTG(2, 0x000, "etc0", 0x00),
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};
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/* pin banks of exynos8890 pin-controller 3 (ESE) */
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static const struct samsung_pin_bank_data exynos8890_pin_banks3[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS8895_PIN_BANK_EINTG(5, 0x000, "gpf3", 0x00),
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};
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/* pin banks of exynos8890 pin-controller 4 (FP) */
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static const struct samsung_pin_bank_data exynos8890_pin_banks4[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS8895_PIN_BANK_EINTG(4, 0x000, "gpf2", 0x00),
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};
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/* pin banks of exynos8890 pin-controller 5 (FSYS0) */
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static const struct samsung_pin_bank_data exynos8890_pin_banks5[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS8895_PIN_BANK_EINTG(4, 0x000, "gpi1", 0x00),
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EXYNOS8895_PIN_BANK_EINTG(8, 0x020, "gpi2", 0x04),
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};
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/* pin banks of exynos8890 pin-controller 6 (FSYS1) */
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static const struct samsung_pin_bank_data exynos8890_pin_banks6[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS8895_PIN_BANK_EINTG(7, 0x000, "gpj0", 0x00),
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};
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/* pin banks of exynos8890 pin-controller 7 (NFC) */
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static const struct samsung_pin_bank_data exynos8890_pin_banks7[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS8895_PIN_BANK_EINTG(3, 0x000, "gpf0", 0x00),
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};
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/* pin banks of exynos8890 pin-controller 8 (PERIC0) */
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static const struct samsung_pin_bank_data exynos8890_pin_banks8[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS8895_PIN_BANK_EINTG(6, 0x000, "gpi0", 0x00),
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EXYNOS8895_PIN_BANK_EINTG(8, 0x020, "gpd0", 0x04),
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EXYNOS8895_PIN_BANK_EINTG(6, 0x040, "gpd1", 0x08),
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EXYNOS8895_PIN_BANK_EINTG(4, 0x060, "gpd2", 0x0c),
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EXYNOS8895_PIN_BANK_EINTG(4, 0x080, "gpd3", 0x10),
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EXYNOS8895_PIN_BANK_EINTG(2, 0x0A0, "gpb1", 0x14),
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EXYNOS8895_PIN_BANK_EINTG(2, 0x0C0, "gpb2", 0x18),
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EXYNOS8895_PIN_BANK_EINTG(3, 0x0E0, "gpb0", 0x1c),
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EXYNOS8895_PIN_BANK_EINTG(5, 0x100, "gpc0", 0x20),
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EXYNOS8895_PIN_BANK_EINTG(5, 0x120, "gpc1", 0x24),
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EXYNOS8895_PIN_BANK_EINTG(6, 0x140, "gpc2", 0x28),
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EXYNOS8895_PIN_BANK_EINTG(8, 0x160, "gpc3", 0x2c),
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EXYNOS8895_PIN_BANK_EINTG(4, 0x180, "gpk0", 0x30),
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EXYNOS8895_PIN_BANK_EINTG(7, 0x1A0, "etc1", 0x34),
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};
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/* pin banks of exynos8890 pin-controller 9 (PERIC1) */
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static const struct samsung_pin_bank_data exynos8890_pin_banks9[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS8895_PIN_BANK_EINTG(8, 0x000, "gpe0", 0x00),
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EXYNOS8895_PIN_BANK_EINTG(8, 0x020, "gpe5", 0x04),
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EXYNOS8895_PIN_BANK_EINTG(8, 0x040, "gpe6", 0x08),
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EXYNOS8895_PIN_BANK_EINTG(8, 0x060, "gpj1", 0x0c),
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EXYNOS8895_PIN_BANK_EINTG(2, 0x080, "gpj2", 0x10),
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EXYNOS8895_PIN_BANK_EINTG(8, 0x0A0, "gpe2", 0x14),
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EXYNOS8895_PIN_BANK_EINTG(8, 0x0C0, "gpe3", 0x18),
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EXYNOS8895_PIN_BANK_EINTG(8, 0x0E0, "gpe4", 0x1c),
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EXYNOS8895_PIN_BANK_EINTG(8, 0x100, "gpe1", 0x20),
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EXYNOS8895_PIN_BANK_EINTG(4, 0x120, "gpe7", 0x24),
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EXYNOS8895_PIN_BANK_EINTG(3, 0x140, "gpg0", 0x28),
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};
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/* pin banks of exynos8890 pin-controller 10 (TOUCH) */
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static const struct samsung_pin_bank_data exynos8890_pin_banks10[] __initconst = {
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/* Must start with EINTG banks, ordered by EINT group number. */
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EXYNOS8895_PIN_BANK_EINTG(3, 0x000, "gpf1", 0x00),
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};
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static const struct samsung_pin_ctrl exynos8890_pin_ctrl[] __initconst = {
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{
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/* pin-controller instance 0 Alive data */
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.pin_banks = exynos8890_pin_banks0,
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.nr_banks = ARRAY_SIZE(exynos8890_pin_banks0),
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.eint_wkup_init = exynos_eint_wkup_init,
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}, {
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/* pin-controller instance 1 AUD data */
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.pin_banks = exynos8890_pin_banks1,
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.nr_banks = ARRAY_SIZE(exynos8890_pin_banks1),
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.eint_gpio_init = exynos_eint_gpio_init,
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}, {
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/* pin-controller instance 2 CCORE data */
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.pin_banks = exynos8890_pin_banks2,
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.nr_banks = ARRAY_SIZE(exynos8890_pin_banks2),
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.eint_gpio_init = exynos_eint_gpio_init,
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}, {
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/* pin-controller instance 3 ESE data */
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.pin_banks = exynos8890_pin_banks3,
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.nr_banks = ARRAY_SIZE(exynos8890_pin_banks3),
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.eint_gpio_init = exynos_eint_gpio_init,
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}, {
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/* pin-controller instance 4 FP data */
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.pin_banks = exynos8890_pin_banks4,
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.nr_banks = ARRAY_SIZE(exynos8890_pin_banks4),
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.eint_gpio_init = exynos_eint_gpio_init,
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}, {
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/* pin-controller instance 5 FSYS0 data */
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.pin_banks = exynos8890_pin_banks5,
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.nr_banks = ARRAY_SIZE(exynos8890_pin_banks5),
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.eint_gpio_init = exynos_eint_gpio_init,
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}, {
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/* pin-controller instance 6 FSYS1 data */
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.pin_banks = exynos8890_pin_banks6,
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.nr_banks = ARRAY_SIZE(exynos8890_pin_banks6),
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.eint_gpio_init = exynos_eint_gpio_init,
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}, {
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/* pin-controller instance 7 NFC data */
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.pin_banks = exynos8890_pin_banks7,
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.nr_banks = ARRAY_SIZE(exynos8890_pin_banks7),
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.eint_gpio_init = exynos_eint_gpio_init,
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}, {
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/* pin-controller instance 8 PERIC0 data */
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.pin_banks = exynos8890_pin_banks8,
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.nr_banks = ARRAY_SIZE(exynos8890_pin_banks8),
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.eint_gpio_init = exynos_eint_gpio_init,
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}, {
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/* pin-controller instance 9 PERIC1 data */
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.pin_banks = exynos8890_pin_banks9,
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.nr_banks = ARRAY_SIZE(exynos8890_pin_banks9),
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.eint_gpio_init = exynos_eint_gpio_init,
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}, {
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/* pin-controller instance 10 TOUCH data */
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.pin_banks = exynos8890_pin_banks10,
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.nr_banks = ARRAY_SIZE(exynos8890_pin_banks10),
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.eint_gpio_init = exynos_eint_gpio_init,
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},
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};
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const struct samsung_pinctrl_of_match_data exynos8890_of_data __initconst = {
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.ctrl = exynos8890_pin_ctrl,
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.num_ctrl = ARRAY_SIZE(exynos8890_pin_ctrl),
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};
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/* pin banks of exynos8895 pin-controller 0 (ALIVE) */
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static const struct samsung_pin_bank_data exynos8895_pin_banks0[] __initconst = {
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EXYNOS_PIN_BANK_EINTW(8, 0x020, "gpa0", 0x00),
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@ -1498,6 +1498,8 @@ static const struct of_device_id samsung_pinctrl_dt_match[] = {
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.data = &exynos7885_of_data },
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{ .compatible = "samsung,exynos850-pinctrl",
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.data = &exynos850_of_data },
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{ .compatible = "samsung,exynos8890-pinctrl",
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.data = &exynos8890_of_data },
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{ .compatible = "samsung,exynos8895-pinctrl",
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.data = &exynos8895_of_data },
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{ .compatible = "samsung,exynos9810-pinctrl",
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@ -395,6 +395,7 @@ extern const struct samsung_pinctrl_of_match_data exynos7_of_data;
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extern const struct samsung_pinctrl_of_match_data exynos7870_of_data;
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extern const struct samsung_pinctrl_of_match_data exynos7885_of_data;
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extern const struct samsung_pinctrl_of_match_data exynos850_of_data;
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extern const struct samsung_pinctrl_of_match_data exynos8890_of_data;
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extern const struct samsung_pinctrl_of_match_data exynos8895_of_data;
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extern const struct samsung_pinctrl_of_match_data exynos9810_of_data;
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extern const struct samsung_pinctrl_of_match_data exynos990_of_data;
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