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Pin control fixes for the v6.19 series:

Browse Source 
- Fix the mt8189 register base name order back from being fixed
   broken.
 
 - Add REGMAP_MMIO to the pic64gx-gpio2 to avoid build breakages.
 
 - Mark the Qualcomm lpass-lpi pin controller GPIO chip instance
   as sleeping to fix lock splats.
 
 - Update .mailmap with my new kernel.org address for all old mails
   after maintainers ran into issues with this.
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Merge tag 'pinctrl-v6.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control fixes from Linus Walleij:

 - Fix the mt8189 register base name order back from being fixed broken

 - Add REGMAP_MMIO to the pic64gx-gpio2 to avoid build breakages

 - Mark the Qualcomm lpass-lpi pin controller GPIO chip instance as
   sleeping to fix lock splats

 - Update .mailmap with my new kernel.org address for all old mails
   after maintainers ran into issues with this

* tag 'pinctrl-v6.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  pinctrl: qcom: lpass-lpi: mark the GPIO controller as sleeping
  pinctrl: pic64gx-gpio2: Add REGMAP_MMIO dependency
  Update .mailmap for Linus Walleij
  pinctrl: mediatek: mt8189: restore previous register base name array order
This commit is contained in:
Linus Torvalds 2026-01-08 16:38:19 -10:00
commit 623fb9912f
4 changed files with 7 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
.mailmap
View File

@ -473,6 +473,10 @@ Linas Vepstas <linas@austin.ibm.com>
Linus Lüssing <linus.luessing@c0d3.blue> <linus.luessing@ascom.ch>
Linus Lüssing <linus.luessing@c0d3.blue> <linus.luessing@web.de>
Linus Lüssing <linus.luessing@c0d3.blue> <ll@simonwunderlich.de>
Linus Walleij <linusw@kernel.org> <linus.walleij@ericsson.com>
Linus Walleij <linusw@kernel.org> <linus.walleij@stericsson.com>
Linus Walleij <linusw@kernel.org> <linus.walleij@linaro.org>
Linus Walleij <linusw@kernel.org> <triad@df.lth.se>
<linux-hardening@vger.kernel.org> <kernel-hardening@lists.openwall.com>
Li Yang <leoyang.li@nxp.com> <leoli@freescale.com>
Li Yang <leoyang.li@nxp.com> <leo@zh-kernel.org>

1
drivers/pinctrl/Kconfig
View File

@ -491,6 +491,7 @@ config PINCTRL_PIC64GX
depends on ARCH_MICROCHIP || COMPILE_TEST
depends on OF
select GENERIC_PINCONF
select REGMAP_MMIO
default y
help
This selects the pinctrl driver for gpio2 on pic64gx.

2
drivers/pinctrl/mediatek/pinctrl-mt8189.c
View File

@ -1642,7 +1642,7 @@ static const struct mtk_pin_reg_calc mt8189_reg_cals[PINCTRL_PIN_REG_MAX] = {
};
static const char * const mt8189_pinctrl_register_base_names[] = {
"base", "lm", "rb0", "rb1", "bm0", "bm1", "bm2", "lt0", "lt1", "rt",
"base", "bm0", "bm1", "bm2", "lm", "lt0", "lt1", "rb0", "rb1", "rt",
};
static const struct mtk_eint_hw mt8189_eint_hw = {

2
drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
View File

@ -498,7 +498,7 @@ int lpi_pinctrl_probe(struct platform_device *pdev)
pctrl->chip.base = -1;
pctrl->chip.ngpio = data->npins;
pctrl->chip.label = dev_name(dev);
pctrl->chip.can_sleep = false;
pctrl->chip.can_sleep = true;
mutex_init(&pctrl->lock);