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arm64: dts: rockchip: fixes ethernet for 100ASK DshanPi A1

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Currently, Ethernet is unusable due to an incorrect PHY address.
This commit fixes this, removes the incorrect 25M clock pinctrl,
and adds the missing PHY supply.

Fixes: d809417c5a40 ("arm64: dts: rockchip: add DTs for 100ASK DShanPi A1")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://patch.msgid.link/20251101120010.41729-3-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Chukun Pan 2025-11-01 20:00:07 +08:00 committed by Heiko Stuebner
parent 0b822c59c8
commit 9c79c9e035
1 changed files with 7 additions and 8 deletions
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15
arch/arm64/boot/dts/rockchip/rk3576-100ask-dshanpi-a1.dts
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@ -190,6 +190,7 @@
clock_in_out = "output";
phy-mode = "rgmii-id";
phy-handle = <&rgmii_phy0>;
phy-supply = <&vcc_3v3_s0>;
pinctrl-names = "default";
pinctrl-0 = <&eth0m0_miim
&eth0m0_tx_bus2
@ -203,13 +204,13 @@
clock_in_out = "output";
phy-mode = "rgmii-id";
phy-handle = <&rgmii_phy1>;
phy-supply = <&vcc_3v3_s0>;
pinctrl-names = "default";
pinctrl-0 = <&eth1m0_miim
&eth1m0_tx_bus2
&eth1m0_rx_bus2
&eth1m0_rgmii_clk
&eth1m0_rgmii_bus
&ethm0_clk1_25m_out>;
&eth1m0_rgmii_bus>;
status = "okay";
};
@ -616,10 +617,9 @@
};
&mdio0 {
rgmii_phy0: phy@1 {
rgmii_phy0: phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x1>;
clocks = <&cru REFCLKO25M_GMAC0_OUT>;
reg = <0>;
pinctrl-names = "default";
pinctrl-0 = <&gmac0_rst>;
reset-assert-us = <20000>;
@ -629,10 +629,9 @@
};
&mdio1 {
rgmii_phy1: phy@1 {
rgmii_phy1: phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x1>;
clocks = <&cru REFCLKO25M_GMAC1_OUT>;
reg = <0>;
pinctrl-names = "default";
pinctrl-0 = <&gmac1_rst>;
reset-assert-us = <20000>;