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spi: aspeed: Add support for the AST2700 SPI controller

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Extend the driver to support the AST2700 SPI controller. Compared to
AST2600, AST2700 has the following characteristics:
 - A 64-bit memory address space.
 - A 64KB address decoding unit.
 - Segment registers now use (start <= range < end) semantics,
   which differs slightly from (start <= range <= end) in AST2600.
 - Known issues related to address decoding range registers have been
   resolved, and the decoding range is now 1GB, which is sufficient.
   Therefore, the adjust_window callback is no longer required on AST2700
   for range adjustment and bug fixes.
 - The SPI clock divider method and timing calibration logic remain
   unchanged from AST2600.

Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
Link: https://patch.msgid.link/20251114101042.1520997-5-chin-ting_kuo@aspeedtech.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Chin-Ting Kuo 2025-11-14 18:10:42 +08:00 committed by Mark Brown
parent 508f3d3b68
commit 9e510e6770
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1 changed files with 71 additions and 0 deletions
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71
drivers/spi/spi-aspeed-smc.c
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@ -985,6 +985,41 @@ static u32 aspeed_spi_segment_ast2600_reg(struct aspeed_spi *aspi,
((end - 1) & AST2600_SEG_ADDR_MASK);
}
/* The Segment Registers of the AST2700 use a 64KB unit. */
#define AST2700_SEG_ADDR_MASK 0x7fff0000
static phys_addr_t aspeed_spi_segment_ast2700_start(struct aspeed_spi *aspi,
u32 reg)
{
u64 start_offset = (reg << 16) & AST2700_SEG_ADDR_MASK;
if (!start_offset)
return aspi->ahb_base_phy;
return aspi->ahb_base_phy + start_offset;
}
static phys_addr_t aspeed_spi_segment_ast2700_end(struct aspeed_spi *aspi,
u32 reg)
{
u64 end_offset = reg & AST2700_SEG_ADDR_MASK;
if (!end_offset)
return aspi->ahb_base_phy;
return aspi->ahb_base_phy + end_offset;
}
static u32 aspeed_spi_segment_ast2700_reg(struct aspeed_spi *aspi,
phys_addr_t start, phys_addr_t end)
{
if (start == end)
return 0;
return (u32)(((start & AST2700_SEG_ADDR_MASK) >> 16) |
(end & AST2700_SEG_ADDR_MASK));
}
/*
* Read timing compensation sequences
*/
@ -1511,6 +1546,40 @@ static const struct aspeed_spi_data ast2600_spi_data = {
.adjust_window = aspeed_adjust_window_ast2600,
};
static const struct aspeed_spi_data ast2700_fmc_data = {
.max_cs = 3,
.hastype = false,
.mode_bits = SPI_RX_QUAD | SPI_TX_QUAD,
.we0 = 16,
.ctl0 = CE0_CTRL_REG,
.timing = CE0_TIMING_COMPENSATION_REG,
.hclk_mask = 0xf0fff0ff,
.hdiv_max = 2,
.min_window_size = 0x10000,
.get_clk_div = aspeed_get_clk_div_ast2600,
.calibrate = aspeed_spi_ast2600_calibrate,
.segment_start = aspeed_spi_segment_ast2700_start,
.segment_end = aspeed_spi_segment_ast2700_end,
.segment_reg = aspeed_spi_segment_ast2700_reg,
};
static const struct aspeed_spi_data ast2700_spi_data = {
.max_cs = 2,
.hastype = false,
.mode_bits = SPI_RX_QUAD | SPI_TX_QUAD,
.we0 = 16,
.ctl0 = CE0_CTRL_REG,
.timing = CE0_TIMING_COMPENSATION_REG,
.hclk_mask = 0xf0fff0ff,
.hdiv_max = 2,
.min_window_size = 0x10000,
.get_clk_div = aspeed_get_clk_div_ast2600,
.calibrate = aspeed_spi_ast2600_calibrate,
.segment_start = aspeed_spi_segment_ast2700_start,
.segment_end = aspeed_spi_segment_ast2700_end,
.segment_reg = aspeed_spi_segment_ast2700_reg,
};
static const struct of_device_id aspeed_spi_matches[] = {
{ .compatible = "aspeed,ast2400-fmc", .data = &ast2400_fmc_data },
{ .compatible = "aspeed,ast2400-spi", .data = &ast2400_spi_data },
@ -1518,6 +1587,8 @@ static const struct of_device_id aspeed_spi_matches[] = {
{ .compatible = "aspeed,ast2500-spi", .data = &ast2500_spi_data },
{ .compatible = "aspeed,ast2600-fmc", .data = &ast2600_fmc_data },
{ .compatible = "aspeed,ast2600-spi", .data = &ast2600_spi_data },
{ .compatible = "aspeed,ast2700-fmc", .data = &ast2700_fmc_data },
{ .compatible = "aspeed,ast2700-spi", .data = &ast2700_spi_data },
{ }
};
MODULE_DEVICE_TABLE(of, aspeed_spi_matches);