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dt-bindings: clock: renesas,r9a09g047-cpg: Add USB2 PHY core clocks

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Add definitions for USB2 PHY core clocks in the R9A09G047 CPG DT
bindings header file.

Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251001212709.579080-9-tommaso.merciai.xr@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Tommaso Merciai 2025-10-01 23:26:52 +02:00 committed by Geert Uytterhoeven
parent 3a86608788
commit c510368bce
1 changed files with 2 additions and 0 deletions
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include/dt-bindings/clock/renesas,r9a09g047-cpg.h
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@ -22,5 +22,7 @@
#define R9A09G047_GBETH_1_CLK_PTP_REF_I 11
#define R9A09G047_USB3_0_REF_ALT_CLK_P 12
#define R9A09G047_USB3_0_CLKCORE 13
#define R9A09G047_USB2_0_CLK_CORE0 14
#define R9A09G047_USB2_0_CLK_CORE1 15
#endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G047_CPG_H__ */