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clk: qcom: gcc-ipq5424: Add gpll0_out_aux clock

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The clock gpll0_out_aux acts as the parent clock for some of the NSS
(Network Subsystem) clocks.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
Link: https://lore.kernel.org/r/20251014-qcom_ipq5424_nsscc-v7-6-081f4956be02@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Luo Jie 2025-10-14 22:35:31 +08:00 committed by Bjorn Andersson
parent e2cf3b7357
commit d08882c66d
1 changed files with 15 additions and 0 deletions
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15
drivers/clk/qcom/gcc-ipq5424.c
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@ -79,6 +79,20 @@ static struct clk_fixed_factor gpll0_div2 = {
},
};
static struct clk_alpha_pll_postdiv gpll0_out_aux = {
.offset = 0x20000,
.regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT],
.width = 4,
.clkr.hw.init = &(const struct clk_init_data) {
.name = "gpll0_out_aux",
.parent_hws = (const struct clk_hw *[]) {
&gpll0.clkr.hw
},
.num_parents = 1,
.ops = &clk_alpha_pll_postdiv_ro_ops,
},
};
static struct clk_alpha_pll gpll2 = {
.offset = 0x21000,
.regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_NSS_HUAYRA],
@ -2934,6 +2948,7 @@ static struct clk_regmap *gcc_ipq5424_clocks[] = {
[GPLL2] = &gpll2.clkr,
[GPLL2_OUT_MAIN] = &gpll2_out_main.clkr,
[GPLL4] = &gpll4.clkr,
[GPLL0_OUT_AUX] = &gpll0_out_aux.clkr,
};
static const struct qcom_reset_map gcc_ipq5424_resets[] = {