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mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2026-01-18 20:40:22 +00:00

6472 Commits

Author SHA1 Message Date
Miaoqian Lin
59b0afd01b crypto: hisilicon/qm - Fix device reference leak in qm_get_qos_value
The qm_get_qos_value() function calls bus_find_device_by_name() which
increases the device reference count, but fails to call put_device()
to balance the reference count and lead to a device reference leak.

Add put_device() calls in both the error path and success path to
properly balance the reference count.

Found via static analysis.

Fixes: 22d7a6c39cab ("crypto: hisilicon/qm - add pci bdf number check")
Cc: stable@vger.kernel.org
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Reviewed-by: Longfang Liu <liulongfang@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-11-06 14:29:49 +08:00
Haotian Zhang
3c9bf72cc1 crypto: aspeed - fix double free caused by devm
The clock obtained via devm_clk_get_enabled() is automatically managed
by devres and will be disabled and freed on driver detach. Manually
calling clk_disable_unprepare() in error path and remove function
causes double free.

Remove the manual clock cleanup in both aspeed_acry_probe()'s error
path and aspeed_acry_remove().

Fixes: 2f1cf4e50c95 ("crypto: aspeed - Add ACRY RSA driver")
Signed-off-by: Haotian Zhang <vulab@iscas.ac.cn>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-10-23 12:53:23 +08:00
Linus Torvalds
7c8dcac8d7 This push contains the following changes:
- Fix zstd regression.
 - Ensure ti driver algorithm are set as async.
 - Revert patch disabling SHA1 in FIPS mode.
 - Fix RNG set_ent null-pointer dereference.
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Merge tag 'v6.18-p2' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6

Pull crypto fixes from Herbert Xu:

 - Fix zstd regression

 - Ensure ti driver algorithm are set as async

 - Revert patch disabling SHA1 in FIPS mode

 - Fix RNG set_ent null-pointer dereference

* tag 'v6.18-p2' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6:
  crypto: rng - Ensure set_ent is always present
  Revert "crypto: testmgr - desupport SHA-1 for FIPS 140"
  crypto: ti - Add CRYPTO_ALG_ASYNC flag to DTHEv2 AES algos
  crypto: zstd - Fix compression bug caused by truncation
2025-10-08 09:38:31 -07:00
Linus Torvalds
908057d185 This update includes the following changes:
Drivers:
 
 - Add ciphertext hiding support to ccp.
 - Add hashjoin, gather and UDMA data move features to hisilicon.
 - Add lz4 and lz77_only to hisilicon.
 - Add xilinx hwrng driver.
 - Add ti driver with ecb/cbc aes support.
 - Add ring buffer idle and command queue telemetry for GEN6 in qat.
 
 Others:
 
 - Use rcu_dereference_all to stop false alarms in rhashtable.
 - Fix CPU number wraparound in padata.
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Merge tag 'v6.18-p1' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6

Pull crypto updates from Herbert Xu:
 "Drivers:
   - Add ciphertext hiding support to ccp
   - Add hashjoin, gather and UDMA data move features to hisilicon
   - Add lz4 and lz77_only to hisilicon
   - Add xilinx hwrng driver
   - Add ti driver with ecb/cbc aes support
   - Add ring buffer idle and command queue telemetry for GEN6 in qat

  Others:
   - Use rcu_dereference_all to stop false alarms in rhashtable
   - Fix CPU number wraparound in padata"

* tag 'v6.18-p1' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (78 commits)
  dt-bindings: rng: hisi-rng: convert to DT schema
  crypto: doc - Add explicit title heading to API docs
  hwrng: ks-sa - fix division by zero in ks_sa_rng_init
  KEYS: X.509: Fix Basic Constraints CA flag parsing
  crypto: anubis - simplify return statement in anubis_mod_init
  crypto: hisilicon/qm - set NULL to qm->debug.qm_diff_regs
  crypto: hisilicon/qm - clear all VF configurations in the hardware
  crypto: hisilicon - enable error reporting again
  crypto: hisilicon/qm - mask axi error before memory init
  crypto: hisilicon/qm - invalidate queues in use
  crypto: qat - Return pointer directly in adf_ctl_alloc_resources
  crypto: aspeed - Fix dma_unmap_sg() direction
  rhashtable: Use rcu_dereference_all and rcu_dereference_all_check
  crypto: comp - Use same definition of context alloc and free ops
  crypto: omap - convert from tasklet to BH workqueue
  crypto: qat - Replace kzalloc() + copy_from_user() with memdup_user()
  crypto: caam - double the entropy delay interval for retry
  padata: WQ_PERCPU added to alloc_workqueue users
  padata: replace use of system_unbound_wq with system_dfl_wq
  crypto: cryptd - WQ_PERCPU added to alloc_workqueue users
  ...
2025-10-04 14:59:29 -07:00
Linus Torvalds
bed0653fe2 IOMMU Updates for Linux v6.18:
Including:
 
 	- Inte VT-d:
 	 - IOMMU driver updated to the latest VT-d specification.
 	 - Don't enable PRS if PDS isn't supported.
 	 - Replace snprintf with scnprintf.
 	 - Fix legacy mode page table dump through debugfs.
 	 - Miscellaneous cleanups.
 
 	- AMD-Vi:
 	  - Support kdump boot when SNP is enabled.
 
 	- Apple-DART:
 	  - 4-level page-table support.
 
 	- RISC-V IOMMU:
 	  - ACPI support.
 
 	- Small number of miscellaneous cleanups and fixes.
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Merge tag 'iommu-updates-v6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/iommu/linux

Pull iommu updates from Joerg Roedel:

 - Inte VT-d:
    - IOMMU driver updated to the latest VT-d specification
    - Don't enable PRS if PDS isn't supported
    - Replace snprintf with scnprintf
    - Fix legacy mode page table dump through debugfs
    - Miscellaneous cleanups

 - AMD-Vi:
     - Support kdump boot when SNP is enabled

 - Apple-DART:
     - 4-level page-table support

 - RISC-V IOMMU:
     - ACPI support

 - Small number of miscellaneous cleanups and fixes

* tag 'iommu-updates-v6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/iommu/linux: (22 commits)
  iommu/vt-d: Disallow dirty tracking if incoherent page walk
  iommu/vt-d: debugfs: Avoid dumping context command register
  iommu/vt-d: Removal of Advanced Fault Logging
  iommu/vt-d: PRS isn't usable if PDS isn't supported
  iommu/vt-d: Remove LPIG from page group response descriptor
  iommu/vt-d: Drop unused cap_super_offset()
  iommu/vt-d: debugfs: Fix legacy mode page table dump logic
  iommu/vt-d: Replace snprintf with scnprintf in dmar_latency_snapshot()
  iommu/io-pgtable-dart: Fix off by one error in table index check
  iommu/riscv: Add ACPI support
  ACPI: scan: Add support for RISC-V in acpi_iommu_configure_id()
  ACPI: RISC-V: Add support for RIMT
  iommu/omap: Use int type to store negative error codes
  iommu/apple-dart: Clear stream error indicator bits for T8110 DARTs
  iommu/amd: Skip enabling command/event buffers for kdump
  crypto: ccp: Skip SEV and SNP INIT for kdump boot
  iommu/amd: Reuse device table for kdump
  iommu/amd: Add support to remap/unmap IOMMU buffers for kdump
  iommu/apple-dart: Add 4-level page table support
  iommu/io-pgtable-dart: Add 4-level page table support
  ...
2025-10-03 18:00:11 -07:00
T Pratham
ef2b6e0317 crypto: ti - Add CRYPTO_ALG_ASYNC flag to DTHEv2 AES algos
Add CRYPTO_ALG_ASYNC flag to DTHEv2 AES-ECB and AES-CBC algorithms so as
to properly indicate driver capabilities.

Suggested-by: Herbert Xu <herbert@gondor.apana.org.au>
Fixes: 52f641bc63a4 ("crypto: ti - Add driver for DTHE V2 AES Engine (ECB, CBC)")
Signed-off-by: T Pratham <t-pratham@ti.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-10-02 17:48:50 +08:00
Linus Torvalds
38057e3236 soc: driver updates for 6.18
Lots of platform specific updates for Qualcomm SoCs, including a
 new TEE subsystem driver for the Qualcomm QTEE firmware interface.
 
 Added support for the Apple A11 SoC in drivers that are shared with the
 M1/M2 series, among more updates for those.
 
 Smaller platform specific driver updates for Renesas, ASpeed, Broadcom,
 Nvidia, Mediatek, Amlogic, TI, Allwinner, and Freescale SoCs.
 
 Driver updates in the cache controller, memory controller and reset
 controller subsystems.
 
 SCMI firmware updates to add more features and improve robustness.
 This includes support for having multiple SCMI providers in a single
 system.
 
 TEE subsystem support for protected DMA-bufs, allowing hardware to
 access memory areas that managed by the kernel but remain inaccessible
 from the CPU in EL1/EL0.
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Merge tag 'soc-drivers-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC driver updates from Arnd Bergmann:
 "Lots of platform specific updates for Qualcomm SoCs, including a new
  TEE subsystem driver for the Qualcomm QTEE firmware interface.

  Added support for the Apple A11 SoC in drivers that are shared with
  the M1/M2 series, among more updates for those.

  Smaller platform specific driver updates for Renesas, ASpeed,
  Broadcom, Nvidia, Mediatek, Amlogic, TI, Allwinner, and Freescale
  SoCs.

  Driver updates in the cache controller, memory controller and reset
  controller subsystems.

  SCMI firmware updates to add more features and improve robustness.
  This includes support for having multiple SCMI providers in a single
  system.

  TEE subsystem support for protected DMA-bufs, allowing hardware to
  access memory areas that managed by the kernel but remain inaccessible
  from the CPU in EL1/EL0"

* tag 'soc-drivers-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (139 commits)
  soc/fsl/qbman: Use for_each_online_cpu() instead of for_each_cpu()
  soc: fsl: qe: Drop legacy-of-mm-gpiochip.h header from GPIO driver
  soc: fsl: qe: Change GPIO driver to a proper platform driver
  tee: fix register_shm_helper()
  pmdomain: apple: Add "apple,t8103-pmgr-pwrstate"
  dt-bindings: spmi: Add Apple A11 and T2 compatible
  serial: qcom-geni: Load UART qup Firmware from linux side
  spi: geni-qcom: Load spi qup Firmware from linux side
  i2c: qcom-geni: Load i2c qup Firmware from linux side
  soc: qcom: geni-se: Add support to load QUP SE Firmware via Linux subsystem
  soc: qcom: geni-se: Cleanup register defines and update copyright
  dt-bindings: qcom: se-common: Add QUP Peripheral-specific properties for I2C, SPI, and SERIAL bus
  Documentation: tee: Add Qualcomm TEE driver
  tee: qcom: enable TEE_IOC_SHM_ALLOC ioctl
  tee: qcom: add primordial object
  tee: add Qualcomm TEE driver
  tee: increase TEE_MAX_ARG_SIZE to 4096
  tee: add TEE_IOCTL_PARAM_ATTR_TYPE_OBJREF
  tee: add TEE_IOCTL_PARAM_ATTR_TYPE_UBUF
  tee: add close_context to TEE driver operation
  ...
2025-10-01 17:32:51 -07:00
Linus Torvalds
b4918003cf MFD for v6.18
This round of updates contains a fair amount of new device support, a couple of fixes and
 some refactoring.  The most notable additions include new drivers for Loongson's Security
 Engine, RNG and TPM, new drivers for TI's TPS6594 Power Button and BQ257xx Charger ICs.
 
 The rest of the set provides a return value check fix and a refactoring to use a more modern
 GPIO API for the VEXPRESS sysreg driver, the removal of a deprecated IRQ ACK function from the
 MC13xxx RTC driver and a new DT binding for the aforementioned TI BQ257xx charger.
 
 New Support & Features
 - Add a suite of drivers for the Loongson Security Engine, including the core controller, a
   Random Number Generator (RNG) and Trusted Platform Module (TPM) support.
 - Introduce support for the TI TPS6594 PMIC's power button, including the input driver, MFD
   cell registration, and a system power-off handler.
 - Add comprehensive support for the TI BQ257xx series of charger ICs, including the core MFD
   driver and a power supply driver for the charger functionality.
 
 Improvements & Fixes
 - Check the return value of devm_gpiochip_add_data() in the VEXPRESS sysreg driver to prevent
   potential silent failures.
 
 Cleanups & Refactoring
 - Add a MAINTAINERS entry for the new Loongson Security Engine drivers.
 - Convert the VEXPRESS sysreg driver to use the modern generic GPIO chip API.
 
 Removals
 - Remove the deprecated and unused mc13xxx_irq_ack() function from the MC13xxx RTC, input and
   touchscreen drivers.
 
 Device Tree Bindings Updates
 - Add device tree bindings for the TI BQ25703A charger.
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Merge tag 'mfd-next-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

Pull MFD updates from Lee Jones:
 "This round of updates contains a fair amount of new device support, a
  couple of fixes and some refactoring. The most notable additions
  include new drivers for Loongson's Security Engine, RNG and TPM, new
  drivers for TI's TPS6594 Power Button and BQ257xx Charger ICs.

  The rest of the set provides a return value check fix and a
  refactoring to use a more modern GPIO API for the VEXPRESS sysreg
  driver, the removal of a deprecated IRQ ACK function from the MC13xxx
  RTC driver and a new DT binding for the aforementioned TI BQ257xx
  charger.

  New Support & Features:
   - Add a suite of drivers for the Loongson Security Engine, including
     the core controller, a Random Number Generator (RNG) and Trusted
     Platform Module (TPM) support.
   - Introduce support for the TI TPS6594 PMIC's power button, including
     the input driver, MFD cell registration, and a system power-off
     handler.
   - Add comprehensive support for the TI BQ257xx series of charger ICs,
     including the core MFD driver and a power supply driver for the
     charger functionality.

  Improvements & Fixes:
   - Check the return value of devm_gpiochip_add_data() in the VEXPRESS
     sysreg driver to prevent potential silent failures.

  Cleanups & Refactoring:
   - Add a MAINTAINERS entry for the new Loongson Security Engine
     drivers.
   - Convert the VEXPRESS sysreg driver to use the modern generic GPIO
     chip API.

  Removals:
   - Remove the deprecated and unused mc13xxx_irq_ack() function from
     the MC13xxx RTC, input and touchscreen drivers.

  Device Tree Bindings Updates:
   - Add device tree bindings for the TI BQ25703A charger"

* tag 'mfd-next-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (69 commits)
  mfd: simple-mfd-i2c: Add compatible string for LX2160ARDB
  mfd: simple-mfd-i2c: Keep compatible strings in alphabetical order
  dt-bindings: mfd: twl: Add missing sub-nodes for TWL4030 & TWL603x
  dt-bindings: watchdog: Add SMARC-sAM67 support
  dt-bindings: mfd: tps6594: Allow gpio-line-names
  mfd: intel-lpss: Add Intel Wildcat Lake LPSS PCI IDs
  mfd: 88pm886: Add GPADC cell
  mfd: vexpress-sysreg: Use more common syntax for compound literals
  mfd: rz-mtu3: Fix MTU5 NFCR register offset
  mfd: max77705: Setup the core driver as an interrupt controller
  mfd: cs42l43: Remove IRQ masking in suspend
  mfd: cs42l43: Move IRQ enable/disable to encompass force suspend
  mfd: ls2kbmc: Add Loongson-2K BMC reset function support
  mfd: ls2kbmc: Introduce Loongson-2K BMC core driver
  mfd: bd71828, bd71815: Prepare for power-supply support
  dt-bindings: mfd: aspeed: Add AST2700 SCU compatibles
  dt-bindings: mfd: Convert aspeed,ast2400-p2a-ctrl to DT schema
  dt-bindings: mfd: fsl,mc13xxx: Add buttons node
  dt-bindings: mfd: fsl,mc13xxx: Convert txt to DT schema
  mfd: macsmc: Add "apple,t8103-smc" compatible
  ...
2025-10-01 12:04:12 -07:00
Linus Torvalds
22bdd6e68b - Add functionality to provide runtime firmware updates for the non-x86 parts
of an AMD platform like the security processor (ASP) firmware, modules
   etc, for example. The intent being that these updates are interim,
   live fixups before a proper BIOS update can be attempted
 
 - Add guest support for AMD's Secure AVIC feature which gives encrypted
   guests the needed protection against a malicious hypervisor generating
   unexpected interrupts and injecting them into such guest, thus
   interfering with its operation in an unexpected and negative manner.
   The advantage of this scheme is that the guest determines which
   interrupts and when to accept them vs leaving that to the benevolence
   (or not) of the hypervisor
 
 - Strictly separate the startup code from the rest of the kernel where
   former is executed from the initial 1:1 mapping of memory. The problem
   was that the toolchain-generated version of the code was being
   executed from a different mapping of memory than what was "assumed"
   during code generation, needing an ever-growing pile of fixups for
   absolute memory references which are invalid in the early, 1:1 memory
   mapping during boot.
 
   The major advantage of this is that there's no need to check the 1:1
   mapping portion of the code for absolute relocations anymore and get
   rid of the RIP_REL_REF() macro sprinkling all over the place.
 
   For more info, see Ard's very detailed writeup on this:
   https://lore.kernel.org/r/CAMj1kXEzKEuePEiHB%2BHxvfQbFz0sTiHdn4B%2B%2BzVBJ2mhkPkQ4Q@mail.gmail.com
 
 - The usual cleanups and fixes
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Merge tag 'x86_apic_for_v6.18_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 SEV and apic updates from Borislav Petkov:

 - Add functionality to provide runtime firmware updates for the non-x86
   parts of an AMD platform like the security processor (ASP) firmware,
   modules etc, for example. The intent being that these updates are
   interim, live fixups before a proper BIOS update can be attempted

 - Add guest support for AMD's Secure AVIC feature which gives encrypted
   guests the needed protection against a malicious hypervisor
   generating unexpected interrupts and injecting them into such guest,
   thus interfering with its operation in an unexpected and negative
   manner.

   The advantage of this scheme is that the guest determines which
   interrupts and when to accept them vs leaving that to the benevolence
   (or not) of the hypervisor

 - Strictly separate the startup code from the rest of the kernel where
   former is executed from the initial 1:1 mapping of memory.

   The problem was that the toolchain-generated version of the code was
   being executed from a different mapping of memory than what was
   "assumed" during code generation, needing an ever-growing pile of
   fixups for absolute memory references which are invalid in the early,
   1:1 memory mapping during boot.

   The major advantage of this is that there's no need to check the 1:1
   mapping portion of the code for absolute relocations anymore and get
   rid of the RIP_REL_REF() macro sprinkling all over the place.

   For more info, see Ard's very detailed writeup on this [1]

 - The usual cleanups and fixes

Link: https://lore.kernel.org/r/CAMj1kXEzKEuePEiHB%2BHxvfQbFz0sTiHdn4B%2B%2BzVBJ2mhkPkQ4Q@mail.gmail.com [1]

* tag 'x86_apic_for_v6.18_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (49 commits)
  x86/boot: Drop erroneous __init annotation from early_set_pages_state()
  crypto: ccp - Add AMD Seamless Firmware Servicing (SFS) driver
  crypto: ccp - Add new HV-Fixed page allocation/free API
  x86/sev: Add new dump_rmp parameter to snp_leak_pages() API
  x86/startup/sev: Document the CPUID flow in the boot #VC handler
  objtool: Ignore __pi___cfi_ prefixed symbols
  x86/sev: Zap snp_abort()
  x86/apic/savic: Do not use snp_abort()
  x86/boot: Get rid of the .head.text section
  x86/boot: Move startup code out of __head section
  efistub/x86: Remap inittext read-execute when needed
  x86/boot: Create a confined code area for startup code
  x86/kbuild: Incorporate boot/startup/ via Kbuild makefile
  x86/boot: Revert "Reject absolute references in .head.text"
  x86/boot: Check startup code for absence of absolute relocations
  objtool: Add action to check for absence of absolute relocations
  x86/sev: Export startup routines for later use
  x86/sev: Move __sev_[get|put]_ghcb() into separate noinstr object
  x86/sev: Provide PIC aliases for SEV related data objects
  x86/boot: Provide PIC aliases for 5-level paging related constants
  ...
2025-09-30 13:40:35 -07:00
Linus Torvalds
d8768fb12a Crypto library updates for 6.18
- Add a RISC-V optimized implementation of Poly1305. This code was
   written by Andy Polyakov and contributed by Zhihang Shao.
 
 - Migrate the MD5 code into lib/crypto/, and add KUnit tests for MD5.
   Yes, it's still the 90s, and several kernel subsystems are still using
   MD5 for legacy use cases. As long as that remains the case, it's
   helpful to clean it up in the same way as I've been doing for other
   algorithms. Later, I plan to convert most of these users of MD5 to use
   the new MD5 library API instead of the generic crypto API.
 
 - Simplify the organization of the ChaCha, Poly1305, BLAKE2s, and
   Curve25519 code. Consolidate these into one module per algorithm,
   and centralize the configuration and build process. This is the same
   reorganization that has already been successful for SHA-1 and SHA-2.
 
 - Remove the unused crypto_kpp API for Curve25519.
 
 - Migrate the BLAKE2s and Curve25519 self-tests to KUnit.
 
 - Always enable the architecture-optimized BLAKE2s code.
 
 Due to interdependencies between test and non-test code, both are
 included in this pull request. The broken-down diffstat is as follows:
 
     Tests:            735 insertions(+), 1917 deletions(-)
     RISC-V Poly1305:  877 insertions(+), 1 deletion(-)
     Other:           1777 insertions(+), 3117 deletions(-)
 
 Besides the new RISC-V code which is an addition, there are quite a
 few simplifications due to the improved code organization for multiple
 algorithms, the removal of the unused crypto_kpp API for Curve25519
 and redundant tests, and the redesign of the BLAKE2s test.
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Merge tag 'libcrypto-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ebiggers/linux

Pull crypto library updates from Eric Biggers:

 - Add a RISC-V optimized implementation of Poly1305. This code was
   written by Andy Polyakov and contributed by Zhihang Shao.

 - Migrate the MD5 code into lib/crypto/, and add KUnit tests for MD5.

   Yes, it's still the 90s, and several kernel subsystems are still
   using MD5 for legacy use cases. As long as that remains the case,
   it's helpful to clean it up in the same way as I've been doing for
   other algorithms.

   Later, I plan to convert most of these users of MD5 to use the new
   MD5 library API instead of the generic crypto API.

 - Simplify the organization of the ChaCha, Poly1305, BLAKE2s, and
   Curve25519 code.

   Consolidate these into one module per algorithm, and centralize the
   configuration and build process. This is the same reorganization that
   has already been successful for SHA-1 and SHA-2.

 - Remove the unused crypto_kpp API for Curve25519.

 - Migrate the BLAKE2s and Curve25519 self-tests to KUnit.

 - Always enable the architecture-optimized BLAKE2s code.

* tag 'libcrypto-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ebiggers/linux: (38 commits)
  crypto: md5 - Implement export_core() and import_core()
  wireguard: kconfig: simplify crypto kconfig selections
  lib/crypto: tests: Enable Curve25519 test when CRYPTO_SELFTESTS
  lib/crypto: curve25519: Consolidate into single module
  lib/crypto: curve25519: Move a couple functions out-of-line
  lib/crypto: tests: Add Curve25519 benchmark
  lib/crypto: tests: Migrate Curve25519 self-test to KUnit
  crypto: curve25519 - Remove unused kpp support
  crypto: testmgr - Remove curve25519 kpp tests
  crypto: x86/curve25519 - Remove unused kpp support
  crypto: powerpc/curve25519 - Remove unused kpp support
  crypto: arm/curve25519 - Remove unused kpp support
  crypto: hisilicon/hpre - Remove unused curve25519 kpp support
  lib/crypto: tests: Add KUnit tests for BLAKE2s
  lib/crypto: blake2s: Consolidate into single C translation unit
  lib/crypto: blake2s: Move generic code into blake2s.c
  lib/crypto: blake2s: Always enable arch-optimized BLAKE2s code
  lib/crypto: blake2s: Remove obsolete self-test
  lib/crypto: x86/blake2s: Reduce size of BLAKE2S_SIGMA2
  lib/crypto: chacha: Consolidate into single module
  ...
2025-09-29 15:48:56 -07:00
Joerg Roedel
5f4b8c03f4 Merge branches 'apple/dart', 'ti/omap', 'riscv', 'intel/vt-d' and 'amd/amd-vi' into next 2025-09-26 10:03:33 +02:00
Chenghai Huang
f0cafb02de crypto: hisilicon/qm - set NULL to qm->debug.qm_diff_regs
When the initialization of qm->debug.acc_diff_reg fails,
the probe process does not exit. However, after qm->debug.qm_diff_regs is
freed, it is not set to NULL. This can lead to a double free when the
remove process attempts to free it again. Therefore, qm->debug.qm_diff_regs
should be set to NULL after it is freed.

Fixes: 8be091338971 ("crypto: hisilicon/debugfs - Fix debugfs uninit process issue")
Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-20 20:21:04 +08:00
Weili Qian
64b9642fc2 crypto: hisilicon/qm - clear all VF configurations in the hardware
When disabling SR-IOV, clear the configuration of each VF
in the hardware. Do not exit the configuration clearing process
due to the failure of a single VF. Additionally, Clear the VF
configurations before decrementing the PM counter.

Signed-off-by: Weili Qian <qianweili@huawei.com>
Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-20 20:21:04 +08:00
Weili Qian
80736a97cf crypto: hisilicon - enable error reporting again
When an error occurs on the device, an interrupt is reported.
When the firmware forwards the interrupt to the driver and masks the
error. If the driver does not enable error reporting when an error does
not need to be reset, the device does not report the error to the driver
when the error occurs again. Therefore, after the driver obtains the
information, the error reporting needs to be enabled again.

Signed-off-by: Weili Qian <qianweili@huawei.com>
Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-20 20:21:04 +08:00
Weili Qian
3d716c51e0 crypto: hisilicon/qm - mask axi error before memory init
After the device memory is cleared, if the software sends
the doorbell operation, the hardware may trigger a axi error
when processing the doorbell. This error is caused by memory
clearing and hardware access to address 0. Therefore, the axi
error is masked during this period.

Signed-off-by: Weili Qian <qianweili@huawei.com>
Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-20 20:21:03 +08:00
Weili Qian
85acd1b26b crypto: hisilicon/qm - invalidate queues in use
Before the device reset, although the driver has set the queue
status to intercept doorbells sent by the task process, the reset
thread is isolated from the user-mode task process, so the task process
may still send doorbells. Therefore, before the reset, the queue is
directly invalidated, and the device directly discards the doorbells
sent by the process.

Signed-off-by: Weili Qian <qianweili@huawei.com>
Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-20 20:21:03 +08:00
Herbert Xu
5ce9891ea9 crypto: qat - Return pointer directly in adf_ctl_alloc_resources
Returning values through arguments is confusing and that has
upset the compiler with the recent change to memdup_user:

../drivers/crypto/intel/qat/qat_common/adf_ctl_drv.c: In function ‘adf_ctl_ioctl’:
../drivers/crypto/intel/qat/qat_common/adf_ctl_drv.c:308:26: warning: ‘ctl_data’ may be used uninitialized [-Wmaybe-uninitialized]
  308 |                  ctl_data->device_id);
      |                          ^~
../drivers/crypto/intel/qat/qat_common/adf_ctl_drv.c:294:39: note: ‘ctl_data’ was declared here
  294 |         struct adf_user_cfg_ctl_data *ctl_data;
      |                                       ^~~~~~~~
In function ‘adf_ctl_ioctl_dev_stop’,
    inlined from ‘adf_ctl_ioctl’ at ../drivers/crypto/intel/qat/qat_common/adf_ctl_drv.c:386:9:
../drivers/crypto/intel/qat/qat_common/adf_ctl_drv.c:273:48: warning: ‘ctl_data’ may be used uninitialized [-Wmaybe-uninitialized]
  273 |         ret = adf_ctl_is_device_in_use(ctl_data->device_id);
      |                                        ~~~~~~~~^~~~~~~~~~~
../drivers/crypto/intel/qat/qat_common/adf_ctl_drv.c: In function ‘adf_ctl_ioctl’:
../drivers/crypto/intel/qat/qat_common/adf_ctl_drv.c:261:39: note: ‘ctl_data’ was declared here
  261 |         struct adf_user_cfg_ctl_data *ctl_data;
      |                                       ^~~~~~~~
In function ‘adf_ctl_ioctl_dev_config’,
    inlined from ‘adf_ctl_ioctl’ at ../drivers/crypto/intel/qat/qat_common/adf_ctl_drv.c:382:9:
../drivers/crypto/intel/qat/qat_common/adf_ctl_drv.c:192:54: warning: ‘ctl_data’ may be used uninitialized [-Wmaybe-uninitialized]
  192 |         accel_dev = adf_devmgr_get_dev_by_id(ctl_data->device_id);
      |                                              ~~~~~~~~^~~~~~~~~~~
../drivers/crypto/intel/qat/qat_common/adf_ctl_drv.c: In function ‘adf_ctl_ioctl’:
../drivers/crypto/intel/qat/qat_common/adf_ctl_drv.c:185:39: note: ‘ctl_data’ was declared here
  185 |         struct adf_user_cfg_ctl_data *ctl_data;
      |                                       ^~~~~~~~

Fix this by returning the pointer directly.

Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Reviewed-by: Thorsten Blum <thorsten.blum@linux.dev>
Acked-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-20 20:21:03 +08:00
Thomas Fourier
838d2d5151 crypto: aspeed - Fix dma_unmap_sg() direction
It seems like everywhere in this file, when the request is not
bidirectionala, req->src is mapped with DMA_TO_DEVICE and req->dst is
mapped with DMA_FROM_DEVICE.

Fixes: 62f58b1637b7 ("crypto: aspeed - add HACE crypto driver")
Cc: <stable@vger.kernel.org>
Signed-off-by: Thomas Fourier <fourier.thomas@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-20 20:21:03 +08:00
Dan Moulding
f75f66683d crypto: comp - Use same definition of context alloc and free ops
In commit 42d9f6c77479 ("crypto: acomp - Move scomp stream allocation
code into acomp"), the crypto_acomp_streams struct was made to rely on
having the alloc_ctx and free_ctx operations defined in the same order
as the scomp_alg struct. But in that same commit, the alloc_ctx and
free_ctx members of scomp_alg may be randomized by structure layout
randomization, since they are contained in a pure ops structure
(containing only function pointers). If the pointers within scomp_alg
are randomized, but those in crypto_acomp_streams are not, then
the order may no longer match. This fixes the problem by removing the
union from scomp_alg so that both crypto_acomp_streams and scomp_alg
will share the same definition of alloc_ctx and free_ctx, ensuring
they will always have the same layout.

Signed-off-by: Dan Moulding <dan@danm.net>
Suggested-by: Herbert Xu <herbert@gondor.apana.org.au>
Fixes: 42d9f6c77479 ("crypto: acomp - Move scomp stream allocation code into acomp")
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-20 20:21:03 +08:00
Ashish Kalra
648dbccc03 crypto: ccp - Add AMD Seamless Firmware Servicing (SFS) driver
AMD Seamless Firmware Servicing (SFS) is a secure method to allow
non-persistent updates to running firmware and settings without
requiring BIOS reflash and/or system reset.

SFS does not address anything that runs on the x86 processors and
it can be used to update ASP firmware, modules, register settings
and update firmware for other microprocessors like TMPM, etc.

SFS driver support adds ioctl support to communicate the SFS
commands to the ASP/PSP by using the TEE mailbox interface.

The Seamless Firmware Servicing (SFS) driver is added as a
PSP sub-device.

For detailed information, please look at the SFS specifications:
https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/specifications/58604.pdf

Signed-off-by: Ashish Kalra <ashish.kalra@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>
Acked-by: Herbert Xu <herbert@gondor.apana.org.au>
Link: https://lore.kernel.org/cover.1758057691.git.ashish.kalra@amd.com
2025-09-17 12:17:05 +02:00
Ashish Kalra
e09701dcdd crypto: ccp - Add new HV-Fixed page allocation/free API
When SEV-SNP is active, the TEE extended command header page and all output
buffers for TEE extended commands (such as used by Seamless Firmware servicing
support) must be in hypervisor-fixed state, assigned to the hypervisor and
marked immutable in the RMP entrie(s).

Add a new generic SEV API interface to allocate/free hypervisor fixed pages
which abstracts hypervisor fixed page allocation/free for PSP sub devices. The
API internally uses SNP_INIT_EX to transition pages to HV-Fixed page state.

If SNP is not enabled then the allocator is simply a wrapper over
alloc_pages() and __free_pages().

When the sub device free the pages, they are put on a free list and future
allocation requests will try to re-use the freed pages from this list. But
this list is not preserved across PSP driver load/unload hence this free/reuse
support is only supported while PSP driver is loaded. As HV_FIXED page state
is only changed at reboot, these pages are leaked as they cannot be returned
back to the page allocator and then potentially allocated to guests, which
will cause SEV-SNP guests to fail to start or terminate when accessing the
HV_FIXED page.

Suggested-by: Thomas Lendacky <Thomas.Lendacky@amd.com>
Signed-off-by: Ashish Kalra <ashish.kalra@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>
Acked-by: Herbert Xu <herbert@gondor.apana.org.au>
Link: https://lore.kernel.org/cover.1758057691.git.ashish.kalra@amd.com
2025-09-17 12:11:39 +02:00
Ryo Takakura
381e8ee368 crypto: omap - convert from tasklet to BH workqueue
tasklet has been marked deprecated and it's planned to be
removed. Make omap crypto drivers to use BH workqueue which
is the new interface for executing in BH context in place
of tasklet.

Signed-off-by: Ryo Takakura <ryotkkr98@gmail.com>
Acked-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-13 12:11:06 +08:00
Thorsten Blum
1e26339703 crypto: qat - Replace kzalloc() + copy_from_user() with memdup_user()
Replace kzalloc() followed by copy_from_user() with memdup_user() to
improve and simplify adf_ctl_alloc_resources(). memdup_user() returns
either -ENOMEM or -EFAULT (instead of -EIO) if an error occurs.

Remove the unnecessary device id initialization, since memdup_user()
(like copy_from_user()) immediately overwrites it.

No functional changes intended other than returning the more idiomatic
error code -EFAULT.

Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-13 12:11:06 +08:00
Gaurav Jain
9048beca9c crypto: caam - double the entropy delay interval for retry
during entropy evaluation, if the generated samples fail
any statistical test, then, all of the bits will be discarded,
and a second set of samples will be generated and tested.

the entropy delay interval should be doubled before performing the
retry.

also, ctrlpriv->rng4_sh_init and inst_handles both reads RNG DRNG
status register, but only inst_handles is updated before every retry.
so only check inst_handles and removing ctrlpriv->rng4_sh_init

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-13 12:11:06 +08:00
Eric Biggers
9c6ed103a7 crypto: chelsio - Use library to prepare HMAC keys
To prepare HMAC keys, just use the library functions instead of
crypto_shash.  This is much simpler, avoids depending on the fragile
export_core and import_core methods, and is faster too.

Signed-off-by: Eric Biggers <ebiggers@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-13 12:11:06 +08:00
Eric Biggers
408cf4850f crypto: qat - Use library to prepare HMAC keys
To prepare HMAC keys, just use the library functions instead of
crypto_shash.  This is much simpler, avoids depending on the fragile
export_core and import_core methods, and is faster too.

Acked-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Eric Biggers <ebiggers@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-13 12:11:06 +08:00
Qianfeng Rong
a710a71cd8 crypto: tegra - Use int type to store negative error codes
Change the 'ret' variable in tegra_sha_do_update() from unsigned int to
int, as it needs to store either negative error codes or zero returned
by tegra_se_host1x_submit().

No effect on runtime.

Signed-off-by: Qianfeng Rong <rongqianfeng@vivo.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-13 12:11:06 +08:00
Qianfeng Rong
a9a84a853c crypto: hisilicon/sec - Use int type to store negative error codes
Change the 'ret' variable in sec_hw_init() from u32 to int, as
it needs to store either negative error codes or zero returned by
sec_ipv4_hashmask().

No effect on runtime.

Signed-off-by: Qianfeng Rong <rongqianfeng@vivo.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-13 12:11:06 +08:00
Qianfeng Rong
e002780c14 crypto: ccp - Use int type to store negative error codes
Change the 'ret' variable in __sev_do_cmd_locked() from unsigned int to
int, as it needs to store negative error codes.

No effect on runtime.

Signed-off-by: Qianfeng Rong <rongqianfeng@vivo.com>
Acked-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-13 12:11:05 +08:00
Yunseong Kim
2b0dc40ac6 crypto: ccp - Fix incorrect payload size calculation in psp_poulate_hsti()
payload_size field of the request header is incorrectly calculated using
sizeof(req). Since 'req' is a pointer (struct hsti_request *), sizeof(req)
returns the size of the pointer itself (e.g., 8 bytes on a 64-bit system),
rather than the size of the structure it points to. This leads to an
incorrect payload size being sent to the Platform Security Processor (PSP),
potentially causing the HSTI query command to fail.

Fix this by using sizeof(*req) to correctly calculate the size of the
struct hsti_request.

Signed-off-by: Yunseong Kim <ysk@kzalloc.com>
Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org>> ---
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-13 12:11:05 +08:00
Thomas Fourier
f5d643156e crypto: atmel - Fix dma_unmap_sg() direction
It seems like everywhere in this file, dd->in_sg is mapped with
DMA_TO_DEVICE and dd->out_sg is mapped with DMA_FROM_DEVICE.

Fixes: 13802005d8f2 ("crypto: atmel - add Atmel DES/TDES driver")
Cc: <stable@vger.kernel.org>
Signed-off-by: Thomas Fourier <fourier.thomas@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-13 12:11:05 +08:00
Thomas Fourier
21140e5caf crypto: rockchip - Fix dma_unmap_sg() nents value
The dma_unmap_sg() functions should be called with the same nents as the
dma_map_sg(), not the value the map function returned.

Fixes: 57d67c6e8219 ("crypto: rockchip - rework by using crypto_engine")
Cc: <stable@vger.kernel.org>
Signed-off-by: Thomas Fourier <fourier.thomas@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-13 12:11:05 +08:00
Ovidiu Panait
27d5a2d1ad crytpo: sun8i-ce - factor out prepare/unprepare from sun8i_ce_hash_run()
In order to make the ahash code more clear and modular, split the
monolithic sun8i_ce_hash_run() callback into two parts, prepare and
unprepare (therefore aligning it with the sun8i-ce skcipher code).

Signed-off-by: Ovidiu Panait <ovidiu.panait.oss@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-13 12:11:05 +08:00
Ovidiu Panait
c3a61eea65 crypto: sun8i-ce - save hash buffers and dma info to request context
Similar to sun8i-ce skcipher code, move all request-specific data to
request context. This simplifies sun8i_ce_hash_run() and it eliminates
the remaining kmalloc() calls from the digest path.

Since the 'result' buffer in the request ctx struct is used for from-device
DMA, it needs to be properly aligned to CRYPTO_DMA_ALIGN. Therefore:
- increase reqsize by CRYPTO_DMA_PADDING
- add __aligned(CRYPTO_DMA_ALIGN) attribute for the 'result' buffer
- convert all ahash_request_ctx_dma() calls to ahash_request_ctx_dma()

Signed-off-by: Ovidiu Panait <ovidiu.panait.oss@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-13 12:11:05 +08:00
Ovidiu Panait
49034c03b5 crypto: sun8i-ce - pass task descriptor to cipher prepare/unprepare
To remove some duplicated code, directly pass 'struct skcipher_request' and
'struct ce_task' pointers to sun8i_ce_cipher_{prepare,unprepare}.

Signed-off-by: Ovidiu Panait <ovidiu.panait.oss@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-13 12:11:05 +08:00
Ovidiu Panait
2dc57f02f2 crypto: sun8i-ce - fold sun8i_ce_cipher_run() into sun8i_ce_cipher_do_one()
Fold sun8i_ce_cipher_run() into it's only caller, sun8i_ce_cipher_do_one(),
to eliminate a bit of boilerplate.

Signed-off-by: Ovidiu Panait <ovidiu.panait.oss@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-13 12:11:05 +08:00
Ovidiu Panait
27eaada08c crypto: sun8i-ce - move bounce_iv and backup_iv to request context
Currently, the iv buffers are allocated per flow during driver probe,
which means that the buffers are shared by all requests. This works
because the driver is not yet truly asynchronous, since it waits inside
do_one_request() for the completion irq.

However, the iv data is request-specific, so it should be part of the
request context. Move iv buffers to request context.

The bounce_iv buffer is aligned to sizeof(u32) to match the 'word address'
requirement for the task descriptor's iv field.

Signed-off-by: Ovidiu Panait <ovidiu.panait.oss@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-13 12:11:05 +08:00
Ovidiu Panait
cedb1e9e9a crypto: sun8i-ce - add a new function for dumping task descriptors
In order to remove code duplication, factor out task descriptor dumping to
a new function sun8i_ce_dump_task_descriptors().

Signed-off-by: Ovidiu Panait <ovidiu.panait.oss@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-13 12:11:05 +08:00
Ovidiu Panait
6713d9842b crypto: sun8i-ce - remove unnecessary __maybe_unused annotations
There are 3 instances of '__maybe_unused' annotations that are not needed,
as the variables are always used, so remove them.

Signed-off-by: Ovidiu Panait <ovidiu.panait.oss@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-13 12:11:05 +08:00
Ovidiu Panait
01d7d3c3db crypto: sun8i-ce - remove boilerplate in sun8i_ce_hash_digest()
Retrieve the dev pointer from tfm context to eliminate some boilerplate
code in sun8i_ce_hash_digest().

Signed-off-by: Ovidiu Panait <ovidiu.panait.oss@gmail.com>
Tested-by: Corentin LABBE <clabbe.montjoie@gmail.com>
Reviewed-by: Corentin LABBE <clabbe.montjoie@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-13 12:11:05 +08:00
Ovidiu Panait
9a23ea1f75 crypto: sun8i-ce - remove channel timeout field
Using the number of bytes in the request as DMA timeout is really
inconsistent, as large requests could possibly set a timeout of
hundreds of seconds.

Remove the per-channel timeout field and use a single, static DMA
timeout of 3 seconds for all requests.

Signed-off-by: Ovidiu Panait <ovidiu.panait.oss@gmail.com>
Tested-by: Corentin LABBE <clabbe.montjoie@gmail.com>
Reviewed-by: Corentin LABBE <clabbe.montjoie@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-13 12:11:05 +08:00
Borislav Petkov (AMD)
46834d90a9 crypto: ccp - Always pass in an error pointer to __sev_platform_shutdown_locked()
When

  9770b428b1a2 ("crypto: ccp - Move dev_info/err messages for SEV/SNP init and shutdown")

moved the error messages dumping so that they don't need to be issued by
the callers, it missed the case where __sev_firmware_shutdown() calls
__sev_platform_shutdown_locked() with a NULL argument which leads to
a NULL ptr deref on the shutdown path, during suspend to disk:

  #PF: supervisor read access in kernel mode
  #PF: error_code(0x0000) - not-present page
  PGD 0 P4D 0
  Oops: Oops: 0000 [#1] SMP NOPTI
  CPU: 0 UID: 0 PID: 983 Comm: hib.sh Not tainted 6.17.0-rc4+ #1 PREEMPT(voluntary)
  Hardware name: Supermicro Super Server/H12SSL-i, BIOS 2.5 09/08/2022
  RIP: 0010:__sev_platform_shutdown_locked.cold+0x0/0x21 [ccp]

That rIP is:

  00000000000006fd <__sev_platform_shutdown_locked.cold>:
   6fd:   8b 13                   mov    (%rbx),%edx
   6ff:   48 8b 7d 00             mov    0x0(%rbp),%rdi
   703:   89 c1                   mov    %eax,%ecx

  Code: 74 05 31 ff 41 89 3f 49 8b 3e 89 ea 48 c7 c6 a0 8e 54 a0 41 bf 92 ff ff ff e8 e5 2e 09 e1 c6 05 2a d4 38 00 01 e9 26 af ff ff <8b> 13 48 8b 7d 00 89 c1 48 c7 c6 18 90 54 a0 89 44 24 04 e8 c1 2e
  RSP: 0018:ffffc90005467d00 EFLAGS: 00010282
  RAX: 00000000ffffff92 RBX: 0000000000000000 RCX: 0000000000000000
  			     ^^^^^^^^^^^^^^^^
and %rbx is nice and clean.

  Call Trace:
   <TASK>
   __sev_firmware_shutdown.isra.0
   sev_dev_destroy
   psp_dev_destroy
   sp_destroy
   pci_device_shutdown
   device_shutdown
   kernel_power_off
   hibernate.cold
   state_store
   kernfs_fop_write_iter
   vfs_write
   ksys_write
   do_syscall_64
   entry_SYSCALL_64_after_hwframe

Pass in a pointer to the function-local error var in the caller.

With that addressed, suspending the ccp shows the error properly at
least:

  ccp 0000:47:00.1: sev command 0x2 timed out, disabling PSP
  ccp 0000:47:00.1: SEV: failed to SHUTDOWN error 0x0, rc -110
  SEV-SNP: Leaking PFN range 0x146800-0x146a00
  SEV-SNP: PFN 0x146800 unassigned, dumping non-zero entries in 2M PFN region: [0x146800 - 0x146a00]
  ...
  ccp 0000:47:00.1: SEV-SNP firmware shutdown failed, rc -16, error 0x0
  ACPI: PM: Preparing to enter system sleep state S5
  kvm: exiting hardware virtualization
  reboot: Power down

Btw, this driver is crying to be cleaned up to pass in a proper I/O
struct which can be used to store information between the different
functions, otherwise stuff like that will happen in the future again.

Fixes: 9770b428b1a2 ("crypto: ccp - Move dev_info/err messages for SEV/SNP init and shutdown")
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Cc: <stable@kernel.org>
Reviewed-by: Ashish Kalra <ashish.kalra@amd.com>
Acked-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-13 12:07:44 +08:00
Robert Marko
38b22cde38 crypto: atmel-aes: make it selectable for ARCH_MICROCHIP
LAN969x uses the Atmel crypto, so make it selectable for ARCH_MICROCHIP to
avoid needing to update depends in future if other Microchip SoC-s use it
as well.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Acked-by: Herbert Xu <herbert@gondor.apana.org.au>
Acked-by: Daniel Machon <daniel.machon@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2025-09-09 10:34:22 +02:00
Eric Biggers
ee289d3abe crypto: hisilicon/hpre - Remove unused curve25519 kpp support
Curve25519 is used only via the library API, not the crypto_kpp API.  In
preparation for removing the unused crypto_kpp API for Curve25519,
remove the unused "hpre-curve25519" kpp algorithm.

Cc: Longfang Liu <liulongfang@huawei.com>
Cc: Zhiqi Song <songzhiqi1@huawei.com>
Link: https://lore.kernel.org/r/20250906213523.84915-2-ebiggers@kernel.org
Signed-off-by: Eric Biggers <ebiggers@kernel.org>
2025-09-06 14:45:49 -07:00
Zhushuai Yin
886d698120 crypto: hisilicon/zip - add hashjoin, gather, and UDMA data move features
The new version of the hisilicon zip driver supports the hash join
and gather features, as well as the data move feature (UDMA),
including data copying and memory initialization functions.These
features are registered to the uacce subsystem.

Signed-off-by: Zhushuai Yin <yinzhushuai@huawei.com>
Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-06 15:57:23 +08:00
Chenghai Huang
cf79ed6aac crypto: hisilicon/zip - add lz4 and lz77_only to algorithm sysfs
The current hisilicon zip supports the new algorithms lz77_only and
lz4. To enable user space to recognize the new algorithm support,
add lz77_only and lz4 to the sysfs. Users can now use the new
algorithms through uacce.

Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-06 15:57:23 +08:00
Herbert Xu
35c5097f73 crypto: ti - Enable compile testing for dthev2
Allow ti dthev2 driver to be compile-tested.

Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Acked-by: T Pratham <t-pratham@ti.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-06 15:57:23 +08:00
Herbert Xu
56e6f77ebd crypto: hisilicon/sec2 - Fix false-positive warning of uninitialised qp_ctx
Fix the false-positive warning of qp_ctx being unitialised in
sec_request_init.  The value of ctx_q_num defaults to 2 and is
guaranteed to be non-zero.

Thus qp_ctx is always initialised.  However, the compiler is
not aware of this constraint on ctx_q_num.  Restructure the loop
so that it is obvious to the compiler that ctx_q_num cannot be
zero.

Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Reviewed-by: Longfang Liu <liulongfang@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-06 15:57:23 +08:00
Zhang Enpei
ab315f7288 crypto: caam - switch to use devm_kmemdup_array()
Use devm_kmemdup_array() to avoid multiplication or possible overflows.

Signed-off-by: Zhang Enpei <zhang.enpei@zte.com.cn>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-06 15:57:23 +08:00
Harsh Jain
8979744aca crypto: xilinx - Add TRNG driver for Versal
Add True Random Number Generator(TRNG) driver for Versal
platform.

Co-developed-by: Mounika Botcha <mounika.botcha@amd.com>
Signed-off-by: Mounika Botcha <mounika.botcha@amd.com>
Signed-off-by: Harsh Jain <h.jain@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-09-06 15:57:23 +08:00