André Draszik 8b9cd112f1 soc: samsung: gs101-pmu: implement access tables for read and write ...

Accessing non-existent PMU registers causes an SError, halting the
system.

Implement read and write access tables for the gs101-PMU to specify
which registers are read- and/or writable to avoid that SError.

Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: André Draszik <andre.draszik@linaro.org>
Link: https://patch.msgid.link/20251009-gs101-pmu-regmap-tables-v2-3-2d64f5261952@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

2025-10-18 19:16:45 +02:00

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exynos-chipid.h

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exynos-pmu.h

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exynos-regs-pmu.h

soc: samsung: gs101-pmu: implement access tables for read and write

2025-10-18 19:16:45 +02:00

s3c-pm.h

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