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4fb623074e
Before modifying the prototypes of kernel_neon_begin() and kernel_neon_end() to accommodate kernel mode FP/SIMD state buffers allocated on the stack, move arm64 to the new 'ksimd' scoped guard API, which encapsulates the calls to those functions. For symmetry, do the same for 32-bit ARM too. Reviewed-by: Eric Biggers <ebiggers@kernel.org> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
49 lines
1.4 KiB
C
49 lines
1.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Accelerated CRC-T10DIF using arm64 NEON and Crypto Extensions instructions
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*
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* Copyright (C) 2016 - 2017 Linaro Ltd <ard.biesheuvel@linaro.org>
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*/
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#include <linux/cpufeature.h>
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#include <asm/simd.h>
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static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_asimd);
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static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_pmull);
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#define CRC_T10DIF_PMULL_CHUNK_SIZE 16U
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asmlinkage void crc_t10dif_pmull_p8(u16 init_crc, const u8 *buf, size_t len,
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u8 out[16]);
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asmlinkage u16 crc_t10dif_pmull_p64(u16 init_crc, const u8 *buf, size_t len);
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static inline u16 crc_t10dif_arch(u16 crc, const u8 *data, size_t length)
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{
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if (length >= CRC_T10DIF_PMULL_CHUNK_SIZE && likely(may_use_simd())) {
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if (static_branch_likely(&have_pmull)) {
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scoped_ksimd()
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return crc_t10dif_pmull_p64(crc, data, length);
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} else if (length > CRC_T10DIF_PMULL_CHUNK_SIZE &&
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static_branch_likely(&have_asimd)) {
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u8 buf[16];
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scoped_ksimd()
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crc_t10dif_pmull_p8(crc, data, length, buf);
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return crc_t10dif_generic(0, buf, sizeof(buf));
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}
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}
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return crc_t10dif_generic(crc, data, length);
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}
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#define crc_t10dif_mod_init_arch crc_t10dif_mod_init_arch
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static void crc_t10dif_mod_init_arch(void)
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{
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if (cpu_have_named_feature(ASIMD)) {
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static_branch_enable(&have_asimd);
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if (cpu_have_named_feature(PMULL))
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static_branch_enable(&have_pmull);
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}
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}
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