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0b2333183a
Generally at most 1 blank line is the standard style for DT schema files. Remove the few cases with more than 1 so that the yamllint check for this can be enabled. Acked-by: Lee Jones <lee@kernel.org> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> # remoteproc Acked-by: Georgi Djakov <djakov@kernel.org> Acked-by: Vinod Koul <vkoul@kernel.org> Acked-by: Andi Shyti <andi.shyti@kernel.org> Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Jonathan Cameron <jonathan.cameron@huawei.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Uwe Kleine-König <ukleinek@kernel.org> # for allwinner,sun4i-a10-pwm.yaml Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> # mtd Acked-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com> Acked-by: Manivannan Sadhasivam <mani@kernel.org> # For PCI controller bindings Link: https://patch.msgid.link/20251023143957.2899600-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
203 lines
4.5 KiB
YAML
203 lines
4.5 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/edac/apm,xgene-edac.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: APM X-Gene SoC EDAC
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maintainers:
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- Khuong Dinh <khuong@os.amperecomputing.com>
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description: >
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EDAC node is defined to describe on-chip error detection and correction.
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The following error types are supported:
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memory controller - Memory controller
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PMD (L1/L2) - Processor module unit (PMD) L1/L2 cache
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L3 - L3 cache controller
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SoC - SoC IPs such as Ethernet, SATA, etc
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properties:
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compatible:
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const: apm,xgene-edac
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reg:
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items:
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- description: CPU bus (PCP) resource
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'#address-cells':
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const: 2
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'#size-cells':
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const: 2
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ranges: true
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interrupts:
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description: Interrupt-specifier for MCU, PMD, L3, or SoC error IRQ(s).
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items:
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- description: MCU error IRQ
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- description: PMD error IRQ
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- description: L3 error IRQ
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- description: SoC error IRQ
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minItems: 1
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regmap-csw:
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description: Regmap of the CPU switch fabric (CSW) resource.
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$ref: /schemas/types.yaml#/definitions/phandle
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regmap-mcba:
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description: Regmap of the MCB-A (memory bridge) resource.
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$ref: /schemas/types.yaml#/definitions/phandle
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regmap-mcbb:
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description: Regmap of the MCB-B (memory bridge) resource.
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$ref: /schemas/types.yaml#/definitions/phandle
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regmap-efuse:
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description: Regmap of the PMD efuse resource.
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$ref: /schemas/types.yaml#/definitions/phandle
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regmap-rb:
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description: Regmap of the register bus resource (optional for compatibility).
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$ref: /schemas/types.yaml#/definitions/phandle
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required:
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- compatible
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- regmap-csw
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- regmap-mcba
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- regmap-mcbb
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- regmap-efuse
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- reg
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- interrupts
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# Child-node bindings
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patternProperties:
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'^edacmc@':
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description: Memory controller subnode
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type: object
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additionalProperties: false
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properties:
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compatible:
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const: apm,xgene-edac-mc
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reg:
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maxItems: 1
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memory-controller:
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description: Instance number of the memory controller.
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$ref: /schemas/types.yaml#/definitions/uint32
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maximum: 3
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required:
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- compatible
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- reg
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- memory-controller
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'^edacpmd@':
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description: PMD subnode
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type: object
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additionalProperties: false
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properties:
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compatible:
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const: apm,xgene-edac-pmd
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reg:
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maxItems: 1
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pmd-controller:
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description: Instance number of the PMD controller.
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$ref: /schemas/types.yaml#/definitions/uint32
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maximum: 3
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required:
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- compatible
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- reg
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- pmd-controller
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'^edacl3@':
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description: L3 subnode
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type: object
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additionalProperties: false
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properties:
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compatible:
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enum:
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- apm,xgene-edac-l3
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- apm,xgene-edac-l3-v2
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reg:
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maxItems: 1
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required:
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- compatible
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- reg
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'^edacsoc@':
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description: SoC subnode
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type: object
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additionalProperties: false
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properties:
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compatible:
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enum:
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- apm,xgene-edac-soc
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- apm,xgene-edac-soc-v1
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reg:
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maxItems: 1
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required:
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- compatible
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- reg
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additionalProperties: false
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examples:
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- |
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bus {
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#address-cells = <2>;
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#size-cells = <2>;
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edac@78800000 {
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compatible = "apm,xgene-edac";
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reg = <0x0 0x78800000 0x0 0x100>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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interrupts = <0x0 0x20 0x4>, <0x0 0x21 0x4>, <0x0 0x27 0x4>;
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regmap-csw = <&csw>;
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regmap-mcba = <&mcba>;
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regmap-mcbb = <&mcbb>;
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regmap-efuse = <&efuse>;
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regmap-rb = <&rb>;
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edacmc@7e800000 {
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compatible = "apm,xgene-edac-mc";
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reg = <0x0 0x7e800000 0x0 0x1000>;
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memory-controller = <0>;
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};
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edacpmd@7c000000 {
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compatible = "apm,xgene-edac-pmd";
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reg = <0x0 0x7c000000 0x0 0x200000>;
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pmd-controller = <0>;
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};
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edacl3@7e600000 {
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compatible = "apm,xgene-edac-l3";
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reg = <0x0 0x7e600000 0x0 0x1000>;
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};
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edacsoc@7e930000 {
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compatible = "apm,xgene-edac-soc-v1";
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reg = <0x0 0x7e930000 0x0 0x1000>;
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};
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};
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};
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