mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-01-11 17:10:13 +00:00
8e2baac0f2
ccache: Add a compatible for the pic64gx SoC. No driver change needed, as it falls back to the PolarFire SoC. hisi hha/generic cpu cache maintenance: Add support for a non-architectural mechanism for invalidating memory regions, needed for some cxl implementations on arm64 (and probably elsewhere in the future). The HiSilicon Hydra Home Agent is the first driver to provide this support. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCaSiFRQAKCRB4tDGHoIJi 0glXAQDJ0NsReTniO9TgJkzw05oWwCKoOL4MadxBM/4MRLJXyQD/YWW09btaYxTZ fDVHpb/P2BDD5qNwaXkONMIeoU/iHAo= =zk03 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmkoyhIACgkQmmx57+YA GNla4xAAw7gN+w/AIBFzh50ZT1DFxIaey67k3OGNEnictgWA8IOYu28brmqv04dT vqppDeviw/fT6MC9A1qykRS8KVPbD1UAfD9w3akQsN6Kzb1h+cjhhv2qw4ZsWbjH XcRj0ZeraL/3Pc7ecTiRvJ3ZebvzPeQNOVmkgaEWZusAsTPPzj+riNg0+LwazHrw BDTLXgDZel/lyt8AIkLWWmzUUnr57VO22ZY1/seT4i161+2XjCaECbsCQzV6rTmo EsYsQWf7G8jX5c2DxjVEkmPGVLJMBclvSgtfLABF/Co2rvVFZbdMjkCkHcySmWq5 KcvXsF+hRcHLC2kZ5jmxpyc0rlChYNGNgJUqJGSKM/sQRQmM0zsAGRZMiEb5ZEF5 xXNYAKVkFVAiIo+zw2ph334GIgv2tU5KB2WrNJu6kxqT7qQGZXO44Bg+1jmc6Q9n efZOTAqOfyeT0pwVpdp8ZJfp/mwLceehFhb8u3OUrkM/xiJlvMFSY3cV568bR2z4 XYvEw5UEJybWPgsm5qXUMPgjPqd8nK/UFAwGSJ7zK6p/EM1B3rrNGo2Kdz2AJwxZ /c4lSpr6Nz0MMQJpCfET9eet8fsAJi7UYopDDdNNTSYgiZ+1ZkUAffQX5wBQpGMI czzuDEHwsLhKFPyQ2bqTYs77YS2qiVaHuKtBABkKYvoNodl8Tik= =wip1 -----END PGP SIGNATURE----- Merge tag 'cache-for-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers-late standalone cache drivers for v6.19 ccache: Add a compatible for the pic64gx SoC. No driver change needed, as it falls back to the PolarFire SoC. hisi hha/generic cpu cache maintenance: Add support for a non-architectural mechanism for invalidating memory regions, needed for some cxl implementations on arm64 (and probably elsewhere in the future). The HiSilicon Hydra Home Agent is the first driver to provide this support. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'cache-for-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: MAINTAINERS: refer to intended file in STANDALONE CACHE CONTROLLER DRIVERS cache: Support cache maintenance for HiSilicon SoC Hydra Home Agent cache: Make top level Kconfig menu a boolean dependent on RISCV MAINTAINERS: Add Jonathan Cameron to drivers/cache and add lib/cache_maint.c + header arm64: Select GENERIC_CPU_CACHE_MAINTENANCE lib: Support ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION memregion: Support fine grained invalidate by cpu_cache_invalidate_memregion() memregion: Drop unused IORES_DESC_* parameter from cpu_cache_invalidate_memregion() dt-bindings: cache: sifive,ccache0: add a pic64gx compatible Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Linux kernel
============
There are several guides for kernel developers and users. These guides can
be rendered in a number of formats, like HTML and PDF. Please read
Documentation/admin-guide/README.rst first.
In order to build the documentation, use ``make htmldocs`` or
``make pdfdocs``. The formatted documentation can also be read online at:
https://www.kernel.org/doc/html/latest/
There are various text files in the Documentation/ subdirectory,
several of them using the reStructuredText markup notation.
Please read the Documentation/process/changes.rst file, as it contains the
requirements for building and running the kernel, and information about
the problems which may result by upgrading your kernel.