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Add TRNG node compatible string and reg properities. Signed-off-by: Mounika Botcha <mounika.botcha@amd.com> Signed-off-by: Harsh Jain <h.jain@amd.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
36 lines
767 B
YAML
36 lines
767 B
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/crypto/xlnx,versal-trng.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Xilinx Versal True Random Number Generator Hardware Accelerator
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maintainers:
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- Harsh Jain <h.jain@amd.com>
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- Mounika Botcha <mounika.botcha@amd.com>
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description:
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The Versal True Random Number Generator consists of Ring Oscillators as
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entropy source and a deterministic CTR_DRBG random bit generator (DRBG).
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properties:
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compatible:
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const: xlnx,versal-trng
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reg:
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maxItems: 1
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required:
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- reg
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additionalProperties: false
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examples:
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- |
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rng@f1230000 {
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compatible = "xlnx,versal-trng";
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reg = <0xf1230000 0x1000>;
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};
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...
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