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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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909639aa58
Replace X86_CMPXCHG64 with X86_CX8, as CX8 is the name of the CPUID flag, thus to make it consistent with X86_FEATURE_CX8 defined in <asm/cpufeatures.h>. No functional change intended. Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com> Signed-off-by: Xin Li (Intel) <xin@zytor.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/r/20250228082338.73859-2-xin@zytor.com
154 lines
4.0 KiB
C
154 lines
4.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_CMPXCHG_32_H
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#define _ASM_X86_CMPXCHG_32_H
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/*
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* Note: if you use __cmpxchg64(), or their variants,
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* you need to test for the feature in boot_cpu_data.
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*/
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union __u64_halves {
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u64 full;
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struct {
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u32 low, high;
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};
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};
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#define __arch_cmpxchg64(_ptr, _old, _new, _lock) \
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({ \
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union __u64_halves o = { .full = (_old), }, \
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n = { .full = (_new), }; \
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\
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asm volatile(_lock "cmpxchg8b %[ptr]" \
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: [ptr] "+m" (*(_ptr)), \
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"+a" (o.low), "+d" (o.high) \
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: "b" (n.low), "c" (n.high) \
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: "memory"); \
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\
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o.full; \
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})
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static __always_inline u64 __cmpxchg64(volatile u64 *ptr, u64 old, u64 new)
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{
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return __arch_cmpxchg64(ptr, old, new, LOCK_PREFIX);
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}
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static __always_inline u64 __cmpxchg64_local(volatile u64 *ptr, u64 old, u64 new)
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{
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return __arch_cmpxchg64(ptr, old, new,);
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}
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#define __arch_try_cmpxchg64(_ptr, _oldp, _new, _lock) \
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({ \
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union __u64_halves o = { .full = *(_oldp), }, \
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n = { .full = (_new), }; \
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bool ret; \
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\
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asm volatile(_lock "cmpxchg8b %[ptr]" \
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CC_SET(e) \
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: CC_OUT(e) (ret), \
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[ptr] "+m" (*(_ptr)), \
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"+a" (o.low), "+d" (o.high) \
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: "b" (n.low), "c" (n.high) \
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: "memory"); \
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\
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if (unlikely(!ret)) \
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*(_oldp) = o.full; \
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\
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likely(ret); \
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})
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static __always_inline bool __try_cmpxchg64(volatile u64 *ptr, u64 *oldp, u64 new)
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{
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return __arch_try_cmpxchg64(ptr, oldp, new, LOCK_PREFIX);
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}
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static __always_inline bool __try_cmpxchg64_local(volatile u64 *ptr, u64 *oldp, u64 new)
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{
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return __arch_try_cmpxchg64(ptr, oldp, new,);
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}
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#ifdef CONFIG_X86_CX8
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#define arch_cmpxchg64 __cmpxchg64
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#define arch_cmpxchg64_local __cmpxchg64_local
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#define arch_try_cmpxchg64 __try_cmpxchg64
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#define arch_try_cmpxchg64_local __try_cmpxchg64_local
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#else
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/*
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* Building a kernel capable running on 80386 and 80486. It may be necessary
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* to simulate the cmpxchg8b on the 80386 and 80486 CPU.
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*/
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#define __arch_cmpxchg64_emu(_ptr, _old, _new, _lock_loc, _lock) \
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({ \
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union __u64_halves o = { .full = (_old), }, \
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n = { .full = (_new), }; \
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\
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asm volatile(ALTERNATIVE(_lock_loc \
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"call cmpxchg8b_emu", \
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_lock "cmpxchg8b %a[ptr]", X86_FEATURE_CX8) \
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: ALT_OUTPUT_SP("+a" (o.low), "+d" (o.high)) \
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: "b" (n.low), "c" (n.high), [ptr] "S" (_ptr) \
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: "memory"); \
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\
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o.full; \
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})
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static __always_inline u64 arch_cmpxchg64(volatile u64 *ptr, u64 old, u64 new)
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{
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return __arch_cmpxchg64_emu(ptr, old, new, LOCK_PREFIX_HERE, "lock; ");
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}
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#define arch_cmpxchg64 arch_cmpxchg64
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static __always_inline u64 arch_cmpxchg64_local(volatile u64 *ptr, u64 old, u64 new)
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{
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return __arch_cmpxchg64_emu(ptr, old, new, ,);
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}
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#define arch_cmpxchg64_local arch_cmpxchg64_local
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#define __arch_try_cmpxchg64_emu(_ptr, _oldp, _new, _lock_loc, _lock) \
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({ \
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union __u64_halves o = { .full = *(_oldp), }, \
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n = { .full = (_new), }; \
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bool ret; \
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\
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asm volatile(ALTERNATIVE(_lock_loc \
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"call cmpxchg8b_emu", \
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_lock "cmpxchg8b %a[ptr]", X86_FEATURE_CX8) \
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CC_SET(e) \
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: ALT_OUTPUT_SP(CC_OUT(e) (ret), \
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"+a" (o.low), "+d" (o.high)) \
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: "b" (n.low), "c" (n.high), [ptr] "S" (_ptr) \
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: "memory"); \
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\
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if (unlikely(!ret)) \
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*(_oldp) = o.full; \
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\
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likely(ret); \
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})
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static __always_inline bool arch_try_cmpxchg64(volatile u64 *ptr, u64 *oldp, u64 new)
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{
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return __arch_try_cmpxchg64_emu(ptr, oldp, new, LOCK_PREFIX_HERE, "lock; ");
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}
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#define arch_try_cmpxchg64 arch_try_cmpxchg64
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static __always_inline bool arch_try_cmpxchg64_local(volatile u64 *ptr, u64 *oldp, u64 new)
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{
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return __arch_try_cmpxchg64_emu(ptr, oldp, new, ,);
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}
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#define arch_try_cmpxchg64_local arch_try_cmpxchg64_local
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#endif
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#define system_has_cmpxchg64() boot_cpu_has(X86_FEATURE_CX8)
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#endif /* _ASM_X86_CMPXCHG_32_H */
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