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fa5ef10561
This release is almost entirely new drivers, with a couple of small
changes in generic code. The biggest individual update is a rename of
the existing Microchip driver and the addition of a new driver for the
silicon SPI controller in their PolarFire SoCs. The overlap between the
soft IP supported by the current driver and this new one is regrettably
all in the IP and not in the register interface offered to software.
- Add a time offset parameter for offloads, allowing them to be defined
in relation to each other. This is useful for IIO type applcations
where you trigger an operation then read the result after a delay.
- Add a tracepoint for flash exec_ops, bringing the flash support more
in line with the debuggability of vanilla SPI.
- Support for Airoha EN7523, Arduino MCUs, Aspeed AST2700, Microchip
PolarFire SPI controllers, NXP i.MX51 ECSPI target mode, Qualcomm
IPQ5414 and IPQ5332, Renesas RZ/T2H, RZ/V2N and RZ/2NH and SpacemiT K1
QuadSPI.
There's also a small set of ASoC cleanups that I mistakenly applied to
the SPI tree and then put more stuff on top of before it was brought to
my attention, sorry about that.
-----BEGIN PGP SIGNATURE-----
iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmkt8qUACgkQJNaLcl1U
h9COSAf/buDi3hXYykhEbSlwl839u1XhCU9d8eJF8GhlWR87JeJCb8ou7RdMOQhE
HFehdoD2d5EcPc169cDp2uis8LovGZIPWuzh3D83eZpOOQTLMaQYBrDVNquBoKOR
WVFPPy9X/kb/IR63vM0b5Xv9K6l3ud4yauIsa0ingl9pZi5m2fB3ZEOx9siYYwAn
4fxv43jESbwdTfx33Yc4CkzctZEKuqI2JgLNe/mJZQsdYhS/nLvmDwiZ69k6b4ac
QSHQkP6i+fQzogcbip2z8dA3IUEhDjNQdBbtzmIot8Qbg7zXJkXpAlx2Wstw7Lt8
vLTUY/EHqKh39zok5GECq6E2R6W41w==
=Uw2/
-----END PGP SIGNATURE-----
Merge tag 'spi-v6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown:
"This release is almost entirely new drivers, with a couple of small
changes in generic code.
The biggest individual update is a rename of the existing Microchip
driver and the addition of a new driver for the silicon SPI controller
in their PolarFire SoCs. The overlap between the soft IP supported by
the current driver and this new one is regrettably all in the IP and
not in the register interface offered to software.
- Add a time offset parameter for offloads, allowing them to be
defined in relation to each other. This is useful for IIO type
applcations where you trigger an operation then read the result
after a delay.
- Add a tracepoint for flash exec_ops, bringing the flash support
more in line with the debuggability of vanilla SPI.
- Support for Airoha EN7523, Arduino MCUs, Aspeed AST2700, Microchip
PolarFire SPI controllers, NXP i.MX51 ECSPI target mode, Qualcomm
IPQ5414 and IPQ5332, Renesas RZ/T2H, RZ/V2N and RZ/2NH and SpacemiT
K1 QuadSPI.
There's also a small set of ASoC cleanups that I mistakenly applied to
the SPI tree and then put more stuff on top of before it was brought
to my attention, sorry about that"
* tag 'spi-v6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (80 commits)
spi: microchip-core: Refactor FIFO read and write handlers
spi: ch341: fix out-of-bounds memory access in ch341_transfer_one
spi: microchip-core: Remove unneeded PM related macro
spi: microchip-core: Use SPI_MODE_X_MASK
spi: microchip-core: Utilise temporary variable for struct device
spi: microchip-core: Replace dead code (-ENOMEM error message)
spi: microchip-core: use min() instead of min_t()
spi: dt-bindings: airoha: add compatible for EN7523
spi: airoha-snfi: en7523: workaround flash damaging if UART_TXD was short to GND
spi: dt-bindings: renesas,rzv2h-rspi: Document RZ/V2N SoC support
spi: dt-bindings: renesas,rzv2h-rspi: Document RZ/V2N SoC support
spi: microchip: Enable compile-testing for FPGA SPI controllers
spi: Fix potential uninitialized variable in probe()
spi: rzv2h-rspi: add support for RZ/T2H and RZ/N2H
spi: dt-bindings: renesas,rzv2h-rspi: document RZ/T2H and RZ/N2H
spi: rzv2h-rspi: add support for loopback mode
spi: rzv2h-rspi: add support for variable transfer clock
spi: rzv2h-rspi: add support for using PCLK for transfer clock
spi: rzv2h-rspi: make transfer clock rate finding chip-specific
spi: rzv2h-rspi: avoid recomputing transfer frequency
...