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bb85d206be
Ensure that in the ftrace direct call logic, the CPU register state (with ra = parent return address) is restored to the correct state after the execution of the custom trampoline function and before returning to the traced function. Additionally, guarantee the correctness of the jump logic for jr t0 (traced function address). Cc: stable@vger.kernel.org Fixes: 9cdc3b6a299c ("LoongArch: ftrace: Add direct call support") Reported-by: Youling Tang <tangyouling@kylinos.cn> Acked-by: Steven Rostedt (Google) <rostedt@goodmis.org> Signed-off-by: Chenghao Duan <duanchenghao@kylinos.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
242 lines
5.5 KiB
C
242 lines
5.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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#include <linux/module.h>
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#include <linux/mm.h> /* for handle_mm_fault() */
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#include <linux/ftrace.h>
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#include <linux/sched/stat.h>
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#if !defined(CONFIG_ARM64) && !defined(CONFIG_PPC32)
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#include <asm/asm-offsets.h>
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#endif
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extern void my_direct_func(unsigned long ip);
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void my_direct_func(unsigned long ip)
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{
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trace_printk("ip %lx\n", ip);
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}
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extern void my_tramp(void *);
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#ifdef CONFIG_RISCV
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#include <asm/asm.h>
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asm (
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" .pushsection .text, \"ax\", @progbits\n"
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" .type my_tramp, @function\n"
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" .globl my_tramp\n"
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" my_tramp:\n"
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" addi sp,sp,-3*"SZREG"\n"
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" "REG_S" a0,0*"SZREG"(sp)\n"
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" "REG_S" t0,1*"SZREG"(sp)\n"
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" "REG_S" ra,2*"SZREG"(sp)\n"
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" mv a0,t0\n"
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" call my_direct_func\n"
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" "REG_L" a0,0*"SZREG"(sp)\n"
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" "REG_L" t0,1*"SZREG"(sp)\n"
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" "REG_L" ra,2*"SZREG"(sp)\n"
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" addi sp,sp,3*"SZREG"\n"
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" jr t0\n"
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" .size my_tramp, .-my_tramp\n"
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" .popsection\n"
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);
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#endif /* CONFIG_RISCV */
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#ifdef CONFIG_X86_64
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#include <asm/ibt.h>
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#include <asm/nospec-branch.h>
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asm (
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" .pushsection .text, \"ax\", @progbits\n"
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" .type my_tramp, @function\n"
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" .globl my_tramp\n"
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" my_tramp:"
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ASM_ENDBR
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" pushq %rbp\n"
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" movq %rsp, %rbp\n"
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CALL_DEPTH_ACCOUNT
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" pushq %rdi\n"
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" movq 8(%rbp), %rdi\n"
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" call my_direct_func\n"
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" popq %rdi\n"
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" leave\n"
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ASM_RET
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" .size my_tramp, .-my_tramp\n"
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" .popsection\n"
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);
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#endif /* CONFIG_X86_64 */
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#ifdef CONFIG_S390
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asm (
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" .pushsection .text, \"ax\", @progbits\n"
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" .type my_tramp, @function\n"
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" .globl my_tramp\n"
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" my_tramp:"
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" lgr %r1,%r15\n"
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" stmg %r0,%r5,"__stringify(__SF_GPRS)"(%r15)\n"
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" stg %r14,"__stringify(__SF_GPRS+8*8)"(%r15)\n"
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" aghi %r15,"__stringify(-STACK_FRAME_OVERHEAD)"\n"
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" stg %r1,"__stringify(__SF_BACKCHAIN)"(%r15)\n"
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" lgr %r2,%r0\n"
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" brasl %r14,my_direct_func\n"
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" aghi %r15,"__stringify(STACK_FRAME_OVERHEAD)"\n"
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" lmg %r0,%r5,"__stringify(__SF_GPRS)"(%r15)\n"
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" lg %r14,"__stringify(__SF_GPRS+8*8)"(%r15)\n"
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" lgr %r1,%r0\n"
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" br %r1\n"
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" .size my_tramp, .-my_tramp\n"
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" .popsection\n"
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);
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#endif /* CONFIG_S390 */
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#ifdef CONFIG_ARM64
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asm (
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" .pushsection .text, \"ax\", @progbits\n"
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" .type my_tramp, @function\n"
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" .globl my_tramp\n"
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" my_tramp:"
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" hint 34\n" // bti c
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" sub sp, sp, #32\n"
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" stp x9, x30, [sp]\n"
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" str x0, [sp, #16]\n"
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" mov x0, x30\n"
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" bl my_direct_func\n"
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" ldp x30, x9, [sp]\n"
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" ldr x0, [sp, #16]\n"
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" add sp, sp, #32\n"
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" ret x9\n"
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" .size my_tramp, .-my_tramp\n"
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" .popsection\n"
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);
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#endif /* CONFIG_ARM64 */
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#ifdef CONFIG_LOONGARCH
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#include <asm/asm.h>
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asm (
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" .pushsection .text, \"ax\", @progbits\n"
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" .type my_tramp, @function\n"
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" .globl my_tramp\n"
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" my_tramp:\n"
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" addi.d $sp, $sp, -32\n"
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" st.d $a0, $sp, 0\n"
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" st.d $t0, $sp, 8\n"
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" st.d $ra, $sp, 16\n"
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" move $a0, $t0\n"
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" bl my_direct_func\n"
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" ld.d $a0, $sp, 0\n"
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" ld.d $ra, $sp, 8\n"
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" ld.d $t0, $sp, 16\n"
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" addi.d $sp, $sp, 32\n"
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" jr $t0\n"
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" .size my_tramp, .-my_tramp\n"
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" .popsection\n"
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);
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#endif /* CONFIG_LOONGARCH */
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#ifdef CONFIG_PPC
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#include <asm/ppc_asm.h>
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#ifdef CONFIG_PPC64
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#define STACK_FRAME_SIZE 48
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#else
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#define STACK_FRAME_SIZE 24
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#endif
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#if defined(CONFIG_PPC64_ELF_ABI_V2) && !defined(CONFIG_PPC_KERNEL_PCREL)
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#define PPC64_TOC_SAVE_AND_UPDATE \
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" std 2, 24(1)\n" \
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" bcl 20, 31, 1f\n" \
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" 1: mflr 12\n" \
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" ld 2, (99f - 1b)(12)\n"
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#define PPC64_TOC_RESTORE \
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" ld 2, 24(1)\n"
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#define PPC64_TOC \
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" 99: .quad .TOC.@tocbase\n"
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#else
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#define PPC64_TOC_SAVE_AND_UPDATE ""
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#define PPC64_TOC_RESTORE ""
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#define PPC64_TOC ""
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#endif
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#ifdef CONFIG_PPC_FTRACE_OUT_OF_LINE
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#define PPC_FTRACE_RESTORE_LR \
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PPC_LL" 0, "__stringify(PPC_LR_STKOFF)"(1)\n" \
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" mtlr 0\n"
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#define PPC_FTRACE_RET \
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" blr\n"
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#define PPC_FTRACE_RECOVER_IP \
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" lwz 8, 4(3)\n" \
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" li 9, 6\n" \
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" slw 8, 8, 9\n" \
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" sraw 8, 8, 9\n" \
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" add 3, 3, 8\n" \
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" addi 3, 3, 4\n"
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#else
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#define PPC_FTRACE_RESTORE_LR \
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PPC_LL" 0, "__stringify(PPC_LR_STKOFF)"(1)\n" \
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" mtctr 0\n"
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#define PPC_FTRACE_RET \
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" mtlr 0\n" \
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" bctr\n"
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#define PPC_FTRACE_RECOVER_IP ""
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#endif
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asm (
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" .pushsection .text, \"ax\", @progbits\n"
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" .type my_tramp, @function\n"
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" .globl my_tramp\n"
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" my_tramp:\n"
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PPC_STL" 0, "__stringify(PPC_LR_STKOFF)"(1)\n"
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PPC_STLU" 1, -"__stringify(STACK_FRAME_MIN_SIZE)"(1)\n"
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" mflr 0\n"
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PPC_STL" 0, "__stringify(PPC_LR_STKOFF)"(1)\n"
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PPC_STLU" 1, -"__stringify(STACK_FRAME_SIZE)"(1)\n"
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PPC64_TOC_SAVE_AND_UPDATE
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PPC_STL" 3, "__stringify(STACK_FRAME_MIN_SIZE)"(1)\n"
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" mr 3, 0\n"
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PPC_FTRACE_RECOVER_IP
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" bl my_direct_func\n"
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PPC_LL" 3, "__stringify(STACK_FRAME_MIN_SIZE)"(1)\n"
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PPC64_TOC_RESTORE
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" addi 1, 1, "__stringify(STACK_FRAME_SIZE)"\n"
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PPC_FTRACE_RESTORE_LR
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" addi 1, 1, "__stringify(STACK_FRAME_MIN_SIZE)"\n"
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PPC_LL" 0, "__stringify(PPC_LR_STKOFF)"(1)\n"
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PPC_FTRACE_RET
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PPC64_TOC
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" .size my_tramp, .-my_tramp\n"
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" .popsection\n"
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);
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#endif /* CONFIG_PPC */
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static struct ftrace_ops direct;
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static int __init ftrace_direct_multi_init(void)
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{
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ftrace_set_filter_ip(&direct, (unsigned long) wake_up_process, 0, 0);
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ftrace_set_filter_ip(&direct, (unsigned long) schedule, 0, 0);
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return register_ftrace_direct(&direct, (unsigned long) my_tramp);
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}
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static void __exit ftrace_direct_multi_exit(void)
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{
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unregister_ftrace_direct(&direct, (unsigned long) my_tramp, true);
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}
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module_init(ftrace_direct_multi_init);
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module_exit(ftrace_direct_multi_exit);
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MODULE_AUTHOR("Jiri Olsa");
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MODULE_DESCRIPTION("Example use case of using register_ftrace_direct_multi()");
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MODULE_LICENSE("GPL");
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