mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-01-18 20:40:22 +00:00
5fb0249319
Core changes:
- Allow pins to be identified/marked as GPIO mode with
a special callback. The pin controller core is now
"aware" if a pin is in GPIO mode if the callback is
implemented in the driver, and can thus be marked
as "strict", i.e. disallowing simultaneous use of a
line as GPIO and another function such as I2C. This
is enabled in the Qualcomm TLMM driver and also
implemeted from day 1 in the new Broadcom STB driver.
- Rename the pin config option PIN_CONFIG_OUTPUT to
PIN_CONFIG_LEVEL to better describe what the config is
doing, as well as making it more intuitive what shall
be returned when reading this property.
New drivers:
- Qualcomm SDM660 LPASS LPI TLMM pin controller subdriver.
- Qualcomm Glymur family pin controller driver.
- Broadcom STB family pin controller driver.
- Tegra186 pin controller driver.
- AAEON UP pin controller support. This is some special
pin controller that works as an external advanced line
MUX and amplifier for signals from an Intel SoC.
A cooperative effort with the GPIO maintainer was
needed to reach a solution where we reuse code from
the GPIO aggregator/forwarder driver.
- Renesas RZ/T2H and RZ/N2H pin controller support.
- Axis ARTPEC-8 subdriver for the Samsung pin controller
driver.
Improvements:
- Output enable (OEN) support in the Renesas RZG2L driver.
- Properly support bias pull up/down in the pinctrl-single
driver.
- Move over all GPIO portions using generic MMIO GPIO to
the new generic GPIO chip management which has a nice and
separate API.
- Proper DT bindings for some older Broadcom SoCs.
- External GPIO (EGPIO) support in the Qualcomm SM8250.
Deleted code:
- Dropped the now unused Samsung S3C24xx drivers.
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Merge tag 'pinctrl-v6.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"We have GPIO awareness in the pin control core and an interesting
AAEON driver.
Core changes:
- Allow pins to be identified/marked as GPIO mode with a special
callback.
The pin controller core is now "aware" if a pin is in GPIO mode if
the callback is implemented in the driver, and can thus be marked
as "strict", i.e. disallowing simultaneous use of a line as GPIO
and another function such as I2C.
This is enabled in the Qualcomm TLMM driver and also implemeted
from day 1 in the new Broadcom STB driver
- Rename the pin config option PIN_CONFIG_OUTPUT to PIN_CONFIG_LEVEL
to better describe what the config is doing, as well as making it
more intuitive what shall be returned when reading this property
New drivers:
- Qualcomm SDM660 LPASS LPI TLMM pin controller subdriver
- Qualcomm Glymur family pin controller driver
- Broadcom STB family pin controller driver
- Tegra186 pin controller driver
- AAEON UP pin controller support.
This is some special pin controller that works as an external
advanced line MUX and amplifier for signals from an Intel SoC. A
cooperative effort with the GPIO maintainer was needed to reach a
solution where we reuse code from the GPIO aggregator/forwarder
driver
- Renesas RZ/T2H and RZ/N2H pin controller support
- Axis ARTPEC-8 subdriver for the Samsung pin controller driver
Improvements:
- Output enable (OEN) support in the Renesas RZG2L driver
- Properly support bias pull up/down in the pinctrl-single driver
- Move over all GPIO portions using generic MMIO GPIO to the new
generic GPIO chip management which has a nice and separate API
- Proper DT bindings for some older Broadcom SoCs
- External GPIO (EGPIO) support in the Qualcomm SM8250
Deleted code:
- Dropped the now unused Samsung S3C24xx drivers"
* tag 'pinctrl-v6.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (75 commits)
pinctrl: use more common syntax for compound literals
pinctrl: Simplify printks with pOF format
pinctrl: qcom: Add SDM660 LPASS LPI TLMM
dt-bindings: pinctrl: qcom: Add SDM660 LPI pinctrl
pinctrl: qcom: lpass-lpi: Add ability to use custom pin offsets
pinctrl: qcom: Add glymur pinctrl driver
dt-bindings: pinctrl: qcom: Add Glymur pinctrl
pinctrl: qcom: sm8250: Add egpio support
pinctrl: generic: rename PIN_CONFIG_OUTPUT to LEVEL
pinctrl: keembay: fix double free in keembay_build_functions()
pinctrl: spacemit: fix typo in PRI_TDI pin name
pinctrl: eswin: Fix regulator error check and Kconfig dependency
pinctrl: bcm: Add STB family pin controller driver
dt-bindings: pinctrl: Add support for Broadcom STB pin controller
pinctrl: qcom: make the pinmuxing strict
pinctrl: qcom: mark the `gpio` and `egpio` pins function as non-strict functions
pinctrl: qcom: add infrastructure for marking pin functions as GPIOs
pinctrl: allow to mark pin functions as requestable GPIOs
pinctrl: qcom: use generic pin function helpers
pinctrl: make struct pinfunction a pointer in struct function_desc
...
98 lines
3.8 KiB
Makefile
98 lines
3.8 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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# generic pinmux support
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subdir-ccflags-$(CONFIG_DEBUG_PINCTRL) += -DDEBUG
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obj-y += core.o pinctrl-utils.o
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obj-$(CONFIG_PINMUX) += pinmux.o
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obj-$(CONFIG_PINCONF) += pinconf.o
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obj-$(CONFIG_GENERIC_PINCONF) += pinconf-generic.o
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obj-$(CONFIG_OF) += devicetree.o
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obj-$(CONFIG_PINCTRL_AMD) += pinctrl-amd.o
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obj-$(CONFIG_PINCTRL_AMDISP) += pinctrl-amdisp.o
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obj-$(CONFIG_PINCTRL_APPLE_GPIO) += pinctrl-apple-gpio.o
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obj-$(CONFIG_PINCTRL_ARTPEC6) += pinctrl-artpec6.o
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obj-$(CONFIG_PINCTRL_AS3722) += pinctrl-as3722.o
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obj-$(CONFIG_PINCTRL_AT91) += pinctrl-at91.o
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obj-$(CONFIG_PINCTRL_AT91PIO4) += pinctrl-at91-pio4.o
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obj-$(CONFIG_PINCTRL_AW9523) += pinctrl-aw9523.o
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obj-$(CONFIG_PINCTRL_AXP209) += pinctrl-axp209.o
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obj-$(CONFIG_PINCTRL_BM1880) += pinctrl-bm1880.o
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obj-$(CONFIG_PINCTRL_CY8C95X0) += pinctrl-cy8c95x0.o
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obj-$(CONFIG_PINCTRL_DA850_PUPD) += pinctrl-da850-pupd.o
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obj-$(CONFIG_PINCTRL_DA9062) += pinctrl-da9062.o
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obj-$(CONFIG_PINCTRL_DIGICOLOR) += pinctrl-digicolor.o
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obj-$(CONFIG_PINCTRL_EIC7700) += pinctrl-eic7700.o
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obj-$(CONFIG_PINCTRL_EQUILIBRIUM) += pinctrl-equilibrium.o
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obj-$(CONFIG_PINCTRL_EP93XX) += pinctrl-ep93xx.o
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obj-$(CONFIG_PINCTRL_EYEQ5) += pinctrl-eyeq5.o
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obj-$(CONFIG_PINCTRL_GEMINI) += pinctrl-gemini.o
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obj-$(CONFIG_PINCTRL_INGENIC) += pinctrl-ingenic.o
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obj-$(CONFIG_PINCTRL_K210) += pinctrl-k210.o
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obj-$(CONFIG_PINCTRL_K230) += pinctrl-k230.o
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obj-$(CONFIG_PINCTRL_KEEMBAY) += pinctrl-keembay.o
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obj-$(CONFIG_PINCTRL_LANTIQ) += pinctrl-lantiq.o
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obj-$(CONFIG_PINCTRL_FALCON) += pinctrl-falcon.o
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obj-$(CONFIG_PINCTRL_LOONGSON2) += pinctrl-loongson2.o
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obj-$(CONFIG_PINCTRL_XWAY) += pinctrl-xway.o
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obj-$(CONFIG_PINCTRL_LPC18XX) += pinctrl-lpc18xx.o
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obj-$(CONFIG_PINCTRL_MAX7360) += pinctrl-max7360.o
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obj-$(CONFIG_PINCTRL_MAX77620) += pinctrl-max77620.o
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obj-$(CONFIG_PINCTRL_MCP23S08_I2C) += pinctrl-mcp23s08_i2c.o
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obj-$(CONFIG_PINCTRL_MCP23S08_SPI) += pinctrl-mcp23s08_spi.o
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obj-$(CONFIG_PINCTRL_MCP23S08) += pinctrl-mcp23s08.o
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obj-$(CONFIG_PINCTRL_MICROCHIP_SGPIO) += pinctrl-microchip-sgpio.o
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obj-$(CONFIG_PINCTRL_MLXBF3) += pinctrl-mlxbf3.o
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obj-$(CONFIG_PINCTRL_OCELOT) += pinctrl-ocelot.o
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obj-$(CONFIG_PINCTRL_PALMAS) += pinctrl-palmas.o
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obj-$(CONFIG_PINCTRL_PEF2256) += pinctrl-pef2256.o
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obj-$(CONFIG_PINCTRL_PIC32) += pinctrl-pic32.o
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obj-$(CONFIG_PINCTRL_PISTACHIO) += pinctrl-pistachio.o
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obj-$(CONFIG_PINCTRL_RK805) += pinctrl-rk805.o
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obj-$(CONFIG_PINCTRL_ROCKCHIP) += pinctrl-rockchip.o
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obj-$(CONFIG_PINCTRL_RP1) += pinctrl-rp1.o
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obj-$(CONFIG_PINCTRL_SCMI) += pinctrl-scmi.o
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obj-$(CONFIG_PINCTRL_SINGLE) += pinctrl-single.o
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obj-$(CONFIG_PINCTRL_ST) += pinctrl-st.o
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obj-$(CONFIG_PINCTRL_STMFX) += pinctrl-stmfx.o
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obj-$(CONFIG_PINCTRL_SX150X) += pinctrl-sx150x.o
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obj-$(CONFIG_PINCTRL_TB10X) += pinctrl-tb10x.o
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obj-$(CONFIG_PINCTRL_TPS6594) += pinctrl-tps6594.o
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obj-$(CONFIG_PINCTRL_TH1520) += pinctrl-th1520.o
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obj-$(CONFIG_PINCTRL_UPBOARD) += pinctrl-upboard.o
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obj-$(CONFIG_PINCTRL_ZYNQMP) += pinctrl-zynqmp.o
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obj-$(CONFIG_PINCTRL_ZYNQ) += pinctrl-zynq.o
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obj-y += actions/
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obj-$(CONFIG_ARCH_ASPEED) += aspeed/
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obj-y += bcm/
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obj-$(CONFIG_PINCTRL_BERLIN) += berlin/
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obj-y += cirrus/
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obj-y += freescale/
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obj-$(CONFIG_X86) += intel/
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obj-y += mediatek/
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obj-$(CONFIG_PINCTRL_MESON) += meson/
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obj-y += mvebu/
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obj-y += nomadik/
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obj-y += nuvoton/
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obj-y += nxp/
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obj-$(CONFIG_PINCTRL_PXA) += pxa/
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obj-y += qcom/
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obj-$(CONFIG_ARCH_REALTEK) += realtek/
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obj-$(CONFIG_PINCTRL_RENESAS) += renesas/
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obj-$(CONFIG_PINCTRL_SAMSUNG) += samsung/
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obj-y += sophgo/
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obj-y += spacemit/
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obj-$(CONFIG_PINCTRL_SPEAR) += spear/
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obj-y += sprd/
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obj-y += starfive/
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obj-$(CONFIG_PINCTRL_STM32) += stm32/
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obj-y += sunplus/
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obj-$(CONFIG_PINCTRL_SUNXI) += sunxi/
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obj-$(CONFIG_ARCH_TEGRA) += tegra/
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obj-y += ti/
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obj-$(CONFIG_PINCTRL_UNIPHIER) += uniphier/
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obj-$(CONFIG_PINCTRL_VISCONTI) += visconti/
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obj-$(CONFIG_ARCH_VT8500) += vt8500/
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