mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-01-11 17:10:13 +00:00
a110f94267
Core changes:
- Handle per-direction skew control in the generic pin config.
- Drop the pointless subsystem boilerplate banner message during
boot. Less noise in the console. It's available as debug message
if someone really want it.
New drivers:
- Samsung Exynos 8890 SoC support.
- Samsung Exynos derived Axis Communications ARTPEC-9 SoC support.
These guys literally live next door to me, ARTPEC spells out
"Axis Real-Time Picture Encoding Chip" and is tailored for camera
image streams and is something they have evolved for a quarter of
a century.
- Mediatek MT6878 SoC support.
- Qualcomm Glymur PMIC support (mostly just compatible strings).
- Qualcomm Kaanapali SoC TLMM support.
- Microchip pic64gx "gpio2" SoC support.
- Microchip Polarfire "iomux0" SoC support.
- CIX Semiconductors SKY1 SoC support.
- Rockchip RK3506 SoC support.
- Airhoa AN7583 chip support.
Improvements:
- Improvements for ST Microelectronics STM32 handling of skew
settings so input and output can have different skew settings.
- A whole bunch of device tree binding cleanups: Marvell Armada and
Berlin, Actions Semiconductor S700 and S900, Broadcom Northstar 2
(NS2), Bitmain BM1880 and Spreadtrum SC9860 are moved over to schema.
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Merge tag 'pinctrl-v6.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"The technical details below. For me the CIX Semi and Axis
Communications ARTPEC-9 SoCs were the most interesting new drivers in
this merge window.
Core changes:
- Handle per-direction skew control in the generic pin config
- Drop the pointless subsystem boilerplate banner message during
boot. Less noise in the console. It's available as debug message if
someone really want it
New drivers:
- Samsung Exynos 8890 SoC support
- Samsung Exynos derived Axis Communications ARTPEC-9 SoC support.
These guys literally live next door to me, ARTPEC spells out "Axis
Real-Time Picture Encoding Chip" and is tailored for camera image
streams and is something they have evolved for a quarter of a
century
- Mediatek MT6878 SoC support
- Qualcomm Glymur PMIC support (mostly just compatible strings)
- Qualcomm Kaanapali SoC TLMM support
- Microchip pic64gx "gpio2" SoC support
- Microchip Polarfire "iomux0" SoC support
- CIX Semiconductors SKY1 SoC support
- Rockchip RK3506 SoC support
- Airhoa AN7583 chip support
Improvements:
- Improvements for ST Microelectronics STM32 handling of skew
settings so input and output can have different skew settings
- A whole bunch of device tree binding cleanups: Marvell Armada and
Berlin, Actions Semiconductor S700 and S900, Broadcom Northstar 2
(NS2), Bitmain BM1880 and Spreadtrum SC9860 are moved over to
schema"
* tag 'pinctrl-v6.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (107 commits)
pinctrl: add CONFIG_OF dependencies for microchip drivers
pinctrl: starfive: use dynamic GPIO base allocation
pinctrl: single: Fix incorrect type for error return variable
MAINTAINERS: Change Linus Walleij mail address
pinctrl: cix: Fix obscure dependency
dt-bindings: pinctrl: cix,sky1-pinctrl: Drop duplicate newline
dt-bindings: pinctrl: aspeed,ast2600-pinctrl: Add PCIe RC PERST# group
pinctrl: airoha: Fix AIROHA_PINCTRL_CONFS_DRIVE_E2 in an7583_pinctrl_match_data
pinctrl: airoha: fix pinctrl function mismatch issue
pinctrl: cherryview: Convert to use intel_gpio_add_pin_ranges()
pinctrl: intel: Export intel_gpio_add_pin_ranges()
pinctrl: renesas: rzg2l: Refactor OEN register PWPR handling
pinctrl: airoha: convert comma to semicolon
pinctrl: elkhartlake: Switch to INTEL_GPP() macro
pinctrl: cherryview: Switch to INTEL_GPP() macro
pinctrl: emmitsburg: Switch to INTEL_GPP() macro
pinctrl: denverton: Switch to INTEL_GPP() macro
pinctrl: cedarfork: Switch to INTEL_GPP() macro
pinctrl: airoha: add support for Airoha AN7583 PINs
dt-bindings: pinctrl: airoha: Document AN7583 Pin Controller
...
101 lines
2.7 KiB
YAML
101 lines
2.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/qcom,sm6115-lpass-lpi-pinctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm SM6115 SoC LPASS LPI TLMM
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maintainers:
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- Konrad Dybcio <konradybcio@kernel.org>
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- Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
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description:
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Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem
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(LPASS) Low Power Island (LPI) of Qualcomm SM6115 SoC.
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properties:
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compatible:
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oneOf:
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- enum:
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- qcom,sm6115-lpass-lpi-pinctrl
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- items:
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- enum:
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- qcom,qcm2290-lpass-lpi-pinctrl
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- const: qcom,sm6115-lpass-lpi-pinctrl
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reg:
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items:
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- description: LPASS LPI TLMM Control and Status registers
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- description: LPASS LPI MCC registers
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clocks:
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items:
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- description: LPASS Audio voting clock
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clock-names:
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items:
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- const: audio
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patternProperties:
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"-state$":
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oneOf:
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- $ref: "#/$defs/qcom-sm6115-lpass-state"
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- patternProperties:
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"-pins$":
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$ref: "#/$defs/qcom-sm6115-lpass-state"
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additionalProperties: false
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$defs:
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qcom-sm6115-lpass-state:
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type: object
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description:
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Pinctrl node's client devices use subnodes for desired pin configuration.
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Client device subnodes use below standard properties.
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$ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
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unevaluatedProperties: false
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properties:
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pins:
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description:
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List of gpio pins affected by the properties specified in this
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subnode.
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items:
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pattern: "^gpio([0-9]|1[0-8])$"
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function:
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enum: [ dmic01_clk, dmic01_data, dmic23_clk, dmic23_data, gpio, i2s1_clk,
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i2s1_data, i2s1_ws, i2s2_clk, i2s2_data, i2s2_ws, i2s3_clk,
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i2s3_data, i2s3_ws, qua_mi2s_data, qua_mi2s_sclk, qua_mi2s_ws,
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swr_rx_clk, swr_rx_data, swr_tx_clk, swr_tx_data, wsa_mclk ]
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description:
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Specify the alternative function to be configured for the specified
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pins.
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allOf:
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- $ref: qcom,lpass-lpi-common.yaml#
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/sound/qcom,q6afe.h>
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lpass_tlmm: pinctrl@a7c0000 {
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compatible = "qcom,sm6115-lpass-lpi-pinctrl";
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reg = <0x0a7c0000 0x20000>,
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<0x0a950000 0x10000>;
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clocks = <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
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clock-names = "audio";
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&lpass_tlmm 0 0 19>;
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};
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