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The Broadcom BCM57708/800G NIC family is branded as ThorUltra.
Update the driver description accordingly.
Fixes: 74715c4ab0fa0 ("bng_en: Add PCI interface")
Signed-off-by: Rajashekar Hudumula <rajashekar.hudumula@broadcom.com>
Reviewed-by: Vikas Gupta <vikas.gupta@broadcom.com>
Reviewed-by: Bhargava Chenna Marreddy <bhargava.marreddy@broadcom.com>
Link: https://patch.msgid.link/20251217104748.3004706-1-rajashekar.hudumula@broadcom.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
256 lines
6.1 KiB
C
256 lines
6.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2025 Broadcom */
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#ifndef _BNGE_H_
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#define _BNGE_H_
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#define DRV_NAME "bng_en"
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#define DRV_SUMMARY "Broadcom ThorUltra NIC Ethernet Driver"
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#include <linux/etherdevice.h>
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#include <linux/bnxt/hsi.h>
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#include "bnge_rmem.h"
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#include "bnge_resc.h"
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#include "bnge_auxr.h"
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#define DRV_VER_MAJ 1
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#define DRV_VER_MIN 15
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#define DRV_VER_UPD 1
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extern char bnge_driver_name[];
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enum board_idx {
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BCM57708,
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};
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struct bnge_auxr_priv {
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struct auxiliary_device aux_dev;
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struct bnge_auxr_dev *auxr_dev;
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int id;
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};
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struct bnge_pf_info {
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u16 fw_fid;
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u16 port_id;
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u8 mac_addr[ETH_ALEN];
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};
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#define INVALID_HW_RING_ID ((u16)-1)
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enum {
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BNGE_FW_CAP_SHORT_CMD = BIT_ULL(0),
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BNGE_FW_CAP_LLDP_AGENT = BIT_ULL(1),
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BNGE_FW_CAP_DCBX_AGENT = BIT_ULL(2),
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BNGE_FW_CAP_IF_CHANGE = BIT_ULL(3),
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BNGE_FW_CAP_KONG_MB_CHNL = BIT_ULL(4),
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BNGE_FW_CAP_ERROR_RECOVERY = BIT_ULL(5),
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BNGE_FW_CAP_PKG_VER = BIT_ULL(6),
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BNGE_FW_CAP_CFA_ADV_FLOW = BIT_ULL(7),
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BNGE_FW_CAP_CFA_RFS_RING_TBL_IDX_V2 = BIT_ULL(8),
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BNGE_FW_CAP_PCIE_STATS_SUPPORTED = BIT_ULL(9),
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BNGE_FW_CAP_EXT_STATS_SUPPORTED = BIT_ULL(10),
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BNGE_FW_CAP_ERR_RECOVER_RELOAD = BIT_ULL(11),
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BNGE_FW_CAP_HOT_RESET = BIT_ULL(12),
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BNGE_FW_CAP_RX_ALL_PKT_TS = BIT_ULL(13),
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BNGE_FW_CAP_VLAN_RX_STRIP = BIT_ULL(14),
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BNGE_FW_CAP_VLAN_TX_INSERT = BIT_ULL(15),
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BNGE_FW_CAP_EXT_HW_STATS_SUPPORTED = BIT_ULL(16),
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BNGE_FW_CAP_LIVEPATCH = BIT_ULL(17),
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BNGE_FW_CAP_HOT_RESET_IF = BIT_ULL(18),
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BNGE_FW_CAP_RING_MONITOR = BIT_ULL(19),
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BNGE_FW_CAP_DBG_QCAPS = BIT_ULL(20),
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BNGE_FW_CAP_THRESHOLD_TEMP_SUPPORTED = BIT_ULL(21),
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BNGE_FW_CAP_DFLT_VLAN_TPID_PCP = BIT_ULL(22),
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BNGE_FW_CAP_VNIC_TUNNEL_TPA = BIT_ULL(23),
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BNGE_FW_CAP_CFA_NTUPLE_RX_EXT_IP_PROTO = BIT_ULL(24),
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BNGE_FW_CAP_CFA_RFS_RING_TBL_IDX_V3 = BIT_ULL(25),
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BNGE_FW_CAP_VNIC_RE_FLUSH = BIT_ULL(26),
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};
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enum {
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BNGE_EN_ROCE_V1 = BIT_ULL(0),
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BNGE_EN_ROCE_V2 = BIT_ULL(1),
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BNGE_EN_STRIP_VLAN = BIT_ULL(2),
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BNGE_EN_SHARED_CHNL = BIT_ULL(3),
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BNGE_EN_UDP_GSO_SUPP = BIT_ULL(4),
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};
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#define BNGE_EN_ROCE (BNGE_EN_ROCE_V1 | BNGE_EN_ROCE_V2)
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enum {
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BNGE_RSS_CAP_RSS_HASH_TYPE_DELTA = BIT(0),
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BNGE_RSS_CAP_UDP_RSS_CAP = BIT(1),
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BNGE_RSS_CAP_NEW_RSS_CAP = BIT(2),
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BNGE_RSS_CAP_RSS_TCAM = BIT(3),
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BNGE_RSS_CAP_AH_V4_RSS_CAP = BIT(4),
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BNGE_RSS_CAP_AH_V6_RSS_CAP = BIT(5),
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BNGE_RSS_CAP_ESP_V4_RSS_CAP = BIT(6),
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BNGE_RSS_CAP_ESP_V6_RSS_CAP = BIT(7),
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};
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#define BNGE_MAX_QUEUE 8
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struct bnge_queue_info {
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u8 queue_id;
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u8 queue_profile;
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};
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struct bnge_dev {
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struct device *dev;
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struct pci_dev *pdev;
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struct net_device *netdev;
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u64 dsn;
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#define BNGE_VPD_FLD_LEN 32
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char board_partno[BNGE_VPD_FLD_LEN];
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char board_serialno[BNGE_VPD_FLD_LEN];
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void __iomem *bar0;
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void __iomem *bar1;
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u16 chip_num;
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u8 chip_rev;
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#if BITS_PER_LONG == 32
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/* ensure atomic 64-bit doorbell writes on 32-bit systems. */
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spinlock_t db_lock;
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#endif
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int db_offset; /* db_offset within db_size */
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int db_size;
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/* HWRM members */
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u16 hwrm_cmd_seq;
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u16 hwrm_cmd_kong_seq;
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struct dma_pool *hwrm_dma_pool;
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struct hlist_head hwrm_pending_list;
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u16 hwrm_max_req_len;
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u16 hwrm_max_ext_req_len;
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unsigned int hwrm_cmd_timeout;
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unsigned int hwrm_cmd_max_timeout;
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struct mutex hwrm_cmd_lock; /* serialize hwrm messages */
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struct hwrm_ver_get_output ver_resp;
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#define FW_VER_STR_LEN 32
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char fw_ver_str[FW_VER_STR_LEN];
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char hwrm_ver_supp[FW_VER_STR_LEN];
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char nvm_cfg_ver[FW_VER_STR_LEN];
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u64 fw_ver_code;
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#define BNGE_FW_VER_CODE(maj, min, bld, rsv) \
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((u64)(maj) << 48 | (u64)(min) << 32 | (u64)(bld) << 16 | (rsv))
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struct bnge_pf_info pf;
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unsigned long state;
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#define BNGE_STATE_DRV_REGISTERED 0
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#define BNGE_STATE_OPEN 1
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u64 fw_cap;
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/* Backing stores */
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struct bnge_ctx_mem_info *ctx;
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u64 flags;
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struct bnge_hw_resc hw_resc;
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u16 tso_max_segs;
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int max_fltr;
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#define BNGE_L2_FLTR_MAX_FLTR 1024
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u32 *rss_indir_tbl;
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#define BNGE_RSS_TABLE_ENTRIES 64
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#define BNGE_RSS_TABLE_SIZE (BNGE_RSS_TABLE_ENTRIES * 4)
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#define BNGE_RSS_TABLE_MAX_TBL 8
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#define BNGE_MAX_RSS_TABLE_SIZE \
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(BNGE_RSS_TABLE_SIZE * BNGE_RSS_TABLE_MAX_TBL)
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#define BNGE_MAX_RSS_TABLE_ENTRIES \
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(BNGE_RSS_TABLE_ENTRIES * BNGE_RSS_TABLE_MAX_TBL)
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u16 rss_indir_tbl_entries;
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u32 rss_cap;
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u32 rss_hash_cfg;
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u16 rx_nr_rings;
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u16 tx_nr_rings;
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u16 tx_nr_rings_per_tc;
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/* Number of NQs */
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u16 nq_nr_rings;
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/* Aux device resources */
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u16 aux_num_msix;
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u16 aux_num_stat_ctxs;
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u16 max_mtu;
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#define BNGE_MAX_MTU 9500
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u16 hw_ring_stats_size;
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#define BNGE_NUM_RX_RING_STATS 8
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#define BNGE_NUM_TX_RING_STATS 8
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#define BNGE_NUM_TPA_RING_STATS 6
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#define BNGE_RING_STATS_SIZE \
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((BNGE_NUM_RX_RING_STATS + BNGE_NUM_TX_RING_STATS + \
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BNGE_NUM_TPA_RING_STATS) * 8)
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u16 max_tpa_v2;
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#define BNGE_SUPPORTS_TPA(bd) ((bd)->max_tpa_v2)
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u8 num_tc;
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u8 max_tc;
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u8 max_lltc; /* lossless TCs */
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struct bnge_queue_info q_info[BNGE_MAX_QUEUE];
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u8 tc_to_qidx[BNGE_MAX_QUEUE];
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u8 q_ids[BNGE_MAX_QUEUE];
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u8 max_q;
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u8 port_count;
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struct bnge_irq *irq_tbl;
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u16 irqs_acquired;
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struct bnge_auxr_priv *aux_priv;
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struct bnge_auxr_dev *auxr_dev;
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};
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static inline bool bnge_is_roce_en(struct bnge_dev *bd)
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{
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return bd->flags & BNGE_EN_ROCE;
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}
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static inline bool bnge_is_agg_reqd(struct bnge_dev *bd)
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{
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if (bd->netdev) {
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struct bnge_net *bn = netdev_priv(bd->netdev);
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if (bn->priv_flags & BNGE_NET_EN_TPA ||
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bn->priv_flags & BNGE_NET_EN_JUMBO)
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return true;
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else
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return false;
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}
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return true;
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}
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static inline void bnge_writeq(struct bnge_dev *bd, u64 val,
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void __iomem *addr)
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{
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#if BITS_PER_LONG == 32
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spin_lock(&bd->db_lock);
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lo_hi_writeq(val, addr);
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spin_unlock(&bd->db_lock);
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#else
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writeq(val, addr);
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#endif
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}
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/* For TX and RX ring doorbells */
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static inline void bnge_db_write(struct bnge_dev *bd, struct bnge_db_info *db,
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u32 idx)
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{
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bnge_writeq(bd, db->db_key64 | DB_RING_IDX(db, idx),
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db->doorbell);
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}
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bool bnge_aux_registered(struct bnge_dev *bd);
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u16 bnge_aux_get_msix(struct bnge_dev *bd);
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#endif /* _BNGE_H_ */
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