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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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The Aspeed MDIO controller may return incorrect data when a read operation
follows immediately after a write. Due to a controller bug, the subsequent
read can latch stale data, causing the polling logic to terminate earlier
than expected.
To work around this hardware issue, insert a dummy read after each write
operation. This ensures that the next actual read returns the correct
data and prevents premature polling exit.
This workaround has been verified to stabilize MDIO transactions on
affected Aspeed platforms.
Fixes: f160e99462c6 ("net: phy: Add mdio-aspeed")
Signed-off-by: Jacky Chou <jacky_chou@aspeedtech.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/20251211-aspeed_mdio_add_dummy_read-v3-1-382868869004@aspeedtech.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
216 lines
5.6 KiB
C
216 lines
5.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/* Copyright (C) 2019 IBM Corp. */
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#include <linux/bitfield.h>
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#include <linux/delay.h>
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#include <linux/reset.h>
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#include <linux/iopoll.h>
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#include <linux/mdio.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_mdio.h>
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#include <linux/phy.h>
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#include <linux/platform_device.h>
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#define DRV_NAME "mdio-aspeed"
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#define ASPEED_MDIO_CTRL 0x0
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#define ASPEED_MDIO_CTRL_FIRE BIT(31)
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#define ASPEED_MDIO_CTRL_ST BIT(28)
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#define ASPEED_MDIO_CTRL_ST_C45 0
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#define ASPEED_MDIO_CTRL_ST_C22 1
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#define ASPEED_MDIO_CTRL_OP GENMASK(27, 26)
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#define MDIO_C22_OP_WRITE 0b01
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#define MDIO_C22_OP_READ 0b10
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#define MDIO_C45_OP_ADDR 0b00
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#define MDIO_C45_OP_WRITE 0b01
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#define MDIO_C45_OP_PREAD 0b10
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#define MDIO_C45_OP_READ 0b11
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#define ASPEED_MDIO_CTRL_PHYAD GENMASK(25, 21)
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#define ASPEED_MDIO_CTRL_REGAD GENMASK(20, 16)
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#define ASPEED_MDIO_CTRL_MIIWDATA GENMASK(15, 0)
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#define ASPEED_MDIO_DATA 0x4
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#define ASPEED_MDIO_DATA_MDC_THRES GENMASK(31, 24)
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#define ASPEED_MDIO_DATA_MDIO_EDGE BIT(23)
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#define ASPEED_MDIO_DATA_MDIO_LATCH GENMASK(22, 20)
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#define ASPEED_MDIO_DATA_IDLE BIT(16)
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#define ASPEED_MDIO_DATA_MIIRDATA GENMASK(15, 0)
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#define ASPEED_MDIO_INTERVAL_US 100
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#define ASPEED_MDIO_TIMEOUT_US (ASPEED_MDIO_INTERVAL_US * 10)
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struct aspeed_mdio {
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void __iomem *base;
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struct reset_control *reset;
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};
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static int aspeed_mdio_op(struct mii_bus *bus, u8 st, u8 op, u8 phyad, u8 regad,
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u16 data)
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{
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struct aspeed_mdio *ctx = bus->priv;
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u32 ctrl;
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dev_dbg(&bus->dev, "%s: st: %u op: %u, phyad: %u, regad: %u, data: %u\n",
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__func__, st, op, phyad, regad, data);
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ctrl = ASPEED_MDIO_CTRL_FIRE
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| FIELD_PREP(ASPEED_MDIO_CTRL_ST, st)
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| FIELD_PREP(ASPEED_MDIO_CTRL_OP, op)
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| FIELD_PREP(ASPEED_MDIO_CTRL_PHYAD, phyad)
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| FIELD_PREP(ASPEED_MDIO_CTRL_REGAD, regad)
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| FIELD_PREP(ASPEED_MDIO_DATA_MIIRDATA, data);
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iowrite32(ctrl, ctx->base + ASPEED_MDIO_CTRL);
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/* Workaround for read-after-write issue.
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* The controller may return stale data if a read follows immediately
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* after a write. A dummy read forces the hardware to update its
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* internal state, ensuring that the next real read returns correct data.
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*/
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ioread32(ctx->base + ASPEED_MDIO_CTRL);
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return readl_poll_timeout(ctx->base + ASPEED_MDIO_CTRL, ctrl,
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!(ctrl & ASPEED_MDIO_CTRL_FIRE),
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ASPEED_MDIO_INTERVAL_US,
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ASPEED_MDIO_TIMEOUT_US);
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}
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static int aspeed_mdio_get_data(struct mii_bus *bus)
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{
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struct aspeed_mdio *ctx = bus->priv;
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u32 data;
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int rc;
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rc = readl_poll_timeout(ctx->base + ASPEED_MDIO_DATA, data,
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data & ASPEED_MDIO_DATA_IDLE,
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ASPEED_MDIO_INTERVAL_US,
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ASPEED_MDIO_TIMEOUT_US);
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if (rc < 0)
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return rc;
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return FIELD_GET(ASPEED_MDIO_DATA_MIIRDATA, data);
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}
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static int aspeed_mdio_read_c22(struct mii_bus *bus, int addr, int regnum)
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{
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int rc;
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rc = aspeed_mdio_op(bus, ASPEED_MDIO_CTRL_ST_C22, MDIO_C22_OP_READ,
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addr, regnum, 0);
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if (rc < 0)
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return rc;
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return aspeed_mdio_get_data(bus);
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}
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static int aspeed_mdio_write_c22(struct mii_bus *bus, int addr, int regnum,
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u16 val)
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{
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return aspeed_mdio_op(bus, ASPEED_MDIO_CTRL_ST_C22, MDIO_C22_OP_WRITE,
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addr, regnum, val);
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}
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static int aspeed_mdio_read_c45(struct mii_bus *bus, int addr, int devad,
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int regnum)
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{
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int rc;
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rc = aspeed_mdio_op(bus, ASPEED_MDIO_CTRL_ST_C45, MDIO_C45_OP_ADDR,
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addr, devad, regnum);
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if (rc < 0)
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return rc;
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rc = aspeed_mdio_op(bus, ASPEED_MDIO_CTRL_ST_C45, MDIO_C45_OP_READ,
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addr, devad, 0);
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if (rc < 0)
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return rc;
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return aspeed_mdio_get_data(bus);
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}
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static int aspeed_mdio_write_c45(struct mii_bus *bus, int addr, int devad,
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int regnum, u16 val)
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{
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int rc;
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rc = aspeed_mdio_op(bus, ASPEED_MDIO_CTRL_ST_C45, MDIO_C45_OP_ADDR,
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addr, devad, regnum);
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if (rc < 0)
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return rc;
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return aspeed_mdio_op(bus, ASPEED_MDIO_CTRL_ST_C45, MDIO_C45_OP_WRITE,
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addr, devad, val);
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}
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static int aspeed_mdio_probe(struct platform_device *pdev)
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{
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struct aspeed_mdio *ctx;
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struct mii_bus *bus;
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int rc;
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bus = devm_mdiobus_alloc_size(&pdev->dev, sizeof(*ctx));
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if (!bus)
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return -ENOMEM;
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ctx = bus->priv;
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ctx->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(ctx->base))
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return PTR_ERR(ctx->base);
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ctx->reset = devm_reset_control_get_optional_shared(&pdev->dev, NULL);
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if (IS_ERR(ctx->reset))
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return PTR_ERR(ctx->reset);
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reset_control_deassert(ctx->reset);
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bus->name = DRV_NAME;
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snprintf(bus->id, MII_BUS_ID_SIZE, "%s%d", pdev->name, pdev->id);
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bus->parent = &pdev->dev;
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bus->read = aspeed_mdio_read_c22;
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bus->write = aspeed_mdio_write_c22;
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bus->read_c45 = aspeed_mdio_read_c45;
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bus->write_c45 = aspeed_mdio_write_c45;
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rc = of_mdiobus_register(bus, pdev->dev.of_node);
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if (rc) {
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dev_err(&pdev->dev, "Cannot register MDIO bus!\n");
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reset_control_assert(ctx->reset);
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return rc;
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}
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platform_set_drvdata(pdev, bus);
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return 0;
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}
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static void aspeed_mdio_remove(struct platform_device *pdev)
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{
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struct mii_bus *bus = (struct mii_bus *)platform_get_drvdata(pdev);
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struct aspeed_mdio *ctx = bus->priv;
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reset_control_assert(ctx->reset);
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mdiobus_unregister(bus);
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}
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static const struct of_device_id aspeed_mdio_of_match[] = {
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{ .compatible = "aspeed,ast2600-mdio", },
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{ },
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};
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MODULE_DEVICE_TABLE(of, aspeed_mdio_of_match);
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static struct platform_driver aspeed_mdio_driver = {
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.driver = {
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.name = DRV_NAME,
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.of_match_table = aspeed_mdio_of_match,
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},
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.probe = aspeed_mdio_probe,
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.remove = aspeed_mdio_remove,
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};
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module_platform_driver(aspeed_mdio_driver);
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MODULE_AUTHOR("Andrew Jeffery <andrew@aj.id.au>");
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("ASPEED MDIO bus controller");
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