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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-01-11 17:10:13 +00:00
The KS8995 switch was unconditionally wired to EthC (eth1) on both MI424WR variants, this is wrong: the D revision has the switch connected to EthB (eth0) so pull this assingment out of the generic MI424WR DTSI file and make it a property of the respective variants instead. Signed-off-by: Linus Walleij <linusw@kernel.org> Link: https://patch.msgid.link/20251211-ixp4xx-actiontec-dts-fix-v1-1-97af8e79d474@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
272 lines
5.8 KiB
Plaintext
272 lines
5.8 KiB
Plaintext
// SPDX-License-Identifier: ISC
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/*
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* Device Tree file for the IXP425-based Actiontec MI424WR
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* Based on a board file from OpenWrt by Jose Vasconcellos.
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*/
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#include "intel-ixp42x.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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memory@0 {
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device_type = "memory";
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reg = <0x00000000 0x02000000>;
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};
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chosen {
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bootargs = "console=ttyS0,115200n8";
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stdout-path = "uart1:115200n8";
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};
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leds {
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compatible = "gpio-leds";
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led-wan-coax {
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color = <LED_COLOR_ID_GREEN>;
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function = "wan-coax";
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gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led-power-alarm {
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_ALARM;
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gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led-power {
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_POWER;
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gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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linux,default-trigger = "heartbeat";
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};
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led-wireless {
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_WLAN;
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gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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led-internet-down {
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color = <LED_COLOR_ID_RED>;
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function = "internet-down";
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gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led-internet-up {
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color = <LED_COLOR_ID_GREEN>;
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function = "internet-up";
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gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led-lan-coax {
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color = <LED_COLOR_ID_GREEN>;
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function = "lan-coax";
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gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led-wan-ethernet-alarm {
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color = <LED_COLOR_ID_RED>;
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function = "wan-ethernet-alarm";
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gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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/* The last three LEDs are not mounted but traces exist on the PCB */
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led-phone-1 {
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color = <LED_COLOR_ID_GREEN>;
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function = "phone-1";
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gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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led-phone-2 {
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color = <LED_COLOR_ID_GREEN>;
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function = "phone-2";
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gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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led-voip {
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color = <LED_COLOR_ID_GREEN>;
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function = "voip";
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gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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};
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gpio_keys {
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compatible = "gpio-keys";
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button-reset {
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wakeup-source;
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linux,code = <KEY_RESTART>;
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label = "reset";
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gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
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};
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};
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spi {
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compatible = "spi-gpio";
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#address-cells = <1>;
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#size-cells = <0>;
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sck-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
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mosi-gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
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miso-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
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cs-gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
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num-chipselects = <1>;
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ethernet-switch@0 {
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compatible = "micrel,ks8995";
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reg = <0>;
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spi-max-frequency = <50000000>;
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ethernet-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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ethernet-port@0 {
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reg = <0>;
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label = "lan1";
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phy-mode = "mii";
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phy-handle = <&phy1>;
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};
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ethernet-port@1 {
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reg = <1>;
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label = "lan2";
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phy-mode = "mii";
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phy-handle = <&phy2>;
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};
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ethernet-port@2 {
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reg = <2>;
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label = "lan3";
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phy-mode = "mii";
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phy-handle = <&phy3>;
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};
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ethernet-port@3 {
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reg = <3>;
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label = "lan4";
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phy-mode = "mii";
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phy-handle = <&phy4>;
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};
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ethernet-port@4 {
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reg = <4>;
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phy-mode = "mii";
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fixed-link {
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speed = <100>;
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full-duplex;
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};
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};
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};
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};
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};
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soc {
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bus@c4000000 {
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flash@0,0 {
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compatible = "intel,ixp4xx-flash", "cfi-flash";
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bank-width = <2>;
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/*
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* 8 MB of Flash in 64 0x20000 sized blocks
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* mapped in at CS0.
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*/
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reg = <0 0x00000000 0x0800000>;
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/* Configure expansion bus to allow writes */
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intel,ixp4xx-eb-write-enable = <1>;
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partitions {
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compatible = "redboot-fis";
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fis-index-block = <0x3f>;
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};
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};
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gpio1: gpio@1,0 {
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/* MMIO GPIO at CS1 */
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compatible = "intel,ixp4xx-expansion-bus-mmio-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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big-endian;
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reg = <1 0x00000000 0x2>;
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reg-names = "dat";
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/* Expansion bus settings */
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intel,ixp4xx-eb-write-enable = <1>;
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pci-reset-hog {
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gpio-hog;
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gpios = <7 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "PCI reset";
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};
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pstn-relay-hog-1 {
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gpio-hog;
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gpios = <11 GPIO_ACTIVE_HIGH>;
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output-low;
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line-name = "PSTN relay control 1";
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};
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pstn-relay-hog-2 {
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gpio-hog;
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gpios = <12 GPIO_ACTIVE_HIGH>;
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output-low;
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line-name = "PSTN relay control 2";
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};
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};
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};
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pci@c0000000 {
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status = "okay";
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#interrupt-cells = <1>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map =
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/* IDSEL 13 */
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<0x6800 0 0 1 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 13 is irq 8 */
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<0x6800 0 0 2 &gpio0 6 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 13 is irq 6 */
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/* IDSEL 14 */
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<0x7000 0 0 1 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 14 is irq 7 */
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<0x7000 0 0 2 &gpio0 6 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 14 is irq 8 */
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/* IDSEL 15 */
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<0x7800 0 0 1 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 15 is irq 6 */
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<0x7800 0 0 2 &gpio0 6 IRQ_TYPE_LEVEL_LOW>; /* INT B on slot 15 is irq 7 */
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};
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ethb: ethernet@c8009000 {
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status = "okay";
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queue-rx = <&qmgr 3>;
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queue-txready = <&qmgr 20>;
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phy-mode = "mii";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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/* 1, 2, 3 and 4 are ports on the KS8995 switch */
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phy1: ethernet-phy@1 {
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/* LAN1 */
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reg = <1>;
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};
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phy2: ethernet-phy@2 {
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/* LAN2 */
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reg = <2>;
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};
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phy3: ethernet-phy@3 {
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/* LAN3 */
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reg = <3>;
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};
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phy4: ethernet-phy@4 {
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/* LAN4 */
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reg = <4>;
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};
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};
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};
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ethc: ethernet@c800a000 {
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status = "okay";
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queue-rx = <&qmgr 4>;
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queue-txready = <&qmgr 21>;
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phy-mode = "mii";
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};
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};
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};
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