Samuel Holland 941327ca5d cache: sifive_ccache: Optimize cache flushes ...

Fence instructions are required only at the beginning and the end of
a flush operation, not separately for each cache line being flushed.
Speed up cache flushes by about 15% by removing the extra fences.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

2025-09-11 19:13:21 +01:00

..

ax45mp_cache.c

cache: ax45mp_cache: Align end size to cache boundary in ax45mp_dma_cache_wback()

2024-02-21 16:24:10 +00:00

Kconfig

cache: StarFive: Require a 64-bit system

2024-08-01 07:15:02 -07:00

Makefile

cache: Add StarFive StarLink cache management

2024-05-28 12:34:11 +01:00

sifive_ccache.c

cache: sifive_ccache: Optimize cache flushes

2025-09-11 19:13:21 +01:00

starfive_starlink_cache.c

cache: Add StarFive StarLink cache management

2024-05-28 12:34:11 +01:00