mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-01-17 12:00:35 +00:00
Recent (SM8550+ ish) Qualcomm SoCs have a new mechanism for precisely identifying the specific SKU and the precise speed bin (in the general meaning of this word, anyway): a pair of values called Product Code and Feature Code. Based on this information, we can deduce the available frequencies for things such as Adreno. In the case of Adreno specifically, Pcode is useless for non-prototype SoCs. Introduce a getter for the feature code and export it. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240605-topic-smem_speedbin-v2-2-8989d7e3d176@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
112 lines
2.4 KiB
C
112 lines
2.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
|
|
|
|
#ifndef __QCOM_SOCINFO_H__
|
|
#define __QCOM_SOCINFO_H__
|
|
|
|
#include <linux/types.h>
|
|
|
|
/*
|
|
* SMEM item id, used to acquire handles to respective
|
|
* SMEM region.
|
|
*/
|
|
#define SMEM_HW_SW_BUILD_ID 137
|
|
|
|
#define SMEM_SOCINFO_BUILD_ID_LENGTH 32
|
|
#define SMEM_SOCINFO_CHIP_ID_LENGTH 32
|
|
|
|
/*
|
|
* SoC version type with major number in the upper 16 bits and minor
|
|
* number in the lower 16 bits.
|
|
*/
|
|
#define SOCINFO_MAJOR(ver) (((ver) >> 16) & 0xffff)
|
|
#define SOCINFO_MINOR(ver) ((ver) & 0xffff)
|
|
#define SOCINFO_VERSION(maj, min) ((((maj) & 0xffff) << 16)|((min) & 0xffff))
|
|
|
|
/* Socinfo SMEM item structure */
|
|
struct socinfo {
|
|
__le32 fmt;
|
|
__le32 id;
|
|
__le32 ver;
|
|
char build_id[SMEM_SOCINFO_BUILD_ID_LENGTH];
|
|
/* Version 2 */
|
|
__le32 raw_id;
|
|
__le32 raw_ver;
|
|
/* Version 3 */
|
|
__le32 hw_plat;
|
|
/* Version 4 */
|
|
__le32 plat_ver;
|
|
/* Version 5 */
|
|
__le32 accessory_chip;
|
|
/* Version 6 */
|
|
__le32 hw_plat_subtype;
|
|
/* Version 7 */
|
|
__le32 pmic_model;
|
|
__le32 pmic_die_rev;
|
|
/* Version 8 */
|
|
__le32 pmic_model_1;
|
|
__le32 pmic_die_rev_1;
|
|
__le32 pmic_model_2;
|
|
__le32 pmic_die_rev_2;
|
|
/* Version 9 */
|
|
__le32 foundry_id;
|
|
/* Version 10 */
|
|
__le32 serial_num;
|
|
/* Version 11 */
|
|
__le32 num_pmics;
|
|
__le32 pmic_array_offset;
|
|
/* Version 12 */
|
|
__le32 chip_family;
|
|
__le32 raw_device_family;
|
|
__le32 raw_device_num;
|
|
/* Version 13 */
|
|
__le32 nproduct_id;
|
|
char chip_id[SMEM_SOCINFO_CHIP_ID_LENGTH];
|
|
/* Version 14 */
|
|
__le32 num_clusters;
|
|
__le32 ncluster_array_offset;
|
|
__le32 num_subset_parts;
|
|
__le32 nsubset_parts_array_offset;
|
|
/* Version 15 */
|
|
__le32 nmodem_supported;
|
|
/* Version 16 */
|
|
__le32 feature_code;
|
|
__le32 pcode;
|
|
__le32 npartnamemap_offset;
|
|
__le32 nnum_partname_mapping;
|
|
/* Version 17 */
|
|
__le32 oem_variant;
|
|
/* Version 18 */
|
|
__le32 num_kvps;
|
|
__le32 kvps_offset;
|
|
/* Version 19 */
|
|
__le32 num_func_clusters;
|
|
__le32 boot_cluster;
|
|
__le32 boot_core;
|
|
};
|
|
|
|
/* Internal feature codes */
|
|
enum qcom_socinfo_feature_code {
|
|
/* External feature codes */
|
|
SOCINFO_FC_UNKNOWN = 0x0,
|
|
SOCINFO_FC_AA,
|
|
SOCINFO_FC_AB,
|
|
SOCINFO_FC_AC,
|
|
SOCINFO_FC_AD,
|
|
SOCINFO_FC_AE,
|
|
SOCINFO_FC_AF,
|
|
SOCINFO_FC_AG,
|
|
SOCINFO_FC_AH,
|
|
};
|
|
|
|
/* Internal feature codes */
|
|
/* Valid values: 0 <= n <= 0xf */
|
|
#define SOCINFO_FC_Yn(n) (0xf1 + (n))
|
|
#define SOCINFO_FC_INT_MAX SOCINFO_FC_Yn(0xf)
|
|
|
|
/* Product codes */
|
|
#define SOCINFO_PC_UNKNOWN 0
|
|
#define SOCINFO_PCn(n) ((n) + 1)
|
|
#define SOCINFO_PC_RESERVE (BIT(31) - 1)
|
|
|
|
#endif
|