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mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2026-01-12 09:32:12 +00:00
Richard Weinberger 9661524b9b SPI NOR core changes:
- move SECT_4K_PMC flag out of the core as it's a vendor specific flag
 - s/addr_width/addr_nbytes: address width means the number of IO lines
   used for the address, whereas in the code it is used as the number of
   address bytes.
 - do not change nor->addr_nbytes at SFDP parsing time. At the SFDP parsing
   time we should not change members of struct spi_nor, but instead fill
   members of struct spi_nor_flash_parameters which could later on be used
   by the callers.
 - track flash's internal address mode so that we can use 4B opcodes
   together with opcodes that don't have a 4B opcode correspondent.
 
 SPI NOR manufacturer drivers changes:
 - esmt: Rename "f25l32qa" flash name to "f25l32qa-2s".
 - micron-st: Skip FSR reading if SPI controller does not support it to
   allow flashes that support FSR to work even when attached to such SPI
   controllers.
 - spansion: Add s25hl-t/s25hs-t IDs and fixups.
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Merge tag 'spi-nor/for-5.20' into mtd/next

SPI NOR core changes:
- move SECT_4K_PMC flag out of the core as it's a vendor specific flag
- s/addr_width/addr_nbytes: address width means the number of IO lines
  used for the address, whereas in the code it is used as the number of
  address bytes.
- do not change nor->addr_nbytes at SFDP parsing time. At the SFDP parsing
  time we should not change members of struct spi_nor, but instead fill
  members of struct spi_nor_flash_parameters which could later on be used
  by the callers.
- track flash's internal address mode so that we can use 4B opcodes
  together with opcodes that don't have a 4B opcode correspondent.

SPI NOR manufacturer drivers changes:
- esmt: Rename "f25l32qa" flash name to "f25l32qa-2s".
- micron-st: Skip FSR reading if SPI controller does not support it to
  allow flashes that support FSR to work even when attached to such SPI
  controllers.
- spansion: Add s25hl-t/s25hs-t IDs and fixups.
2022-08-01 21:31:22 +02:00
..